MLXSW_ITEM32_LP
MLXSW_ITEM32_LP(reg, mpar, 0x00, 16, 0x00, 4);
MLXSW_ITEM32_LP(reg, mlcr, 0x00, 16, 0x00, 24);
MLXSW_ITEM32_LP(reg, mpsc, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, momte, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, mtpptr, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, mtpcpc, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, tnqdr, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, sbcm, 0x00, 16, 0x00, 4);
MLXSW_ITEM32_LP(reg, sbpm, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, sbib, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, pude, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, slcr, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, slcor, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, spmlr, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, svfa, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, spvtr, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, svpe, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, spvmlr, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, spfsr, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, spvc, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, spevet, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, smpe, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, cwtp, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, cwtpm, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, ppbt, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, qpts, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, qtct, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, qeec, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, qrwe, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, qpdsm, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, qpdp, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, qpdpm, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, qtctm, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, pmlp, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, pmtu, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, ptys, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, ppad, 0x00, 16, 0x00, 24);
MLXSW_ITEM32_LP(reg, paos, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, pfcc, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, ppcnt, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, pptb, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, pbmc, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, pspa, 0x00, 16, 0x00, 0);
MLXSW_ITEM32_LP(reg, pplr, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, pmecr, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, pddr, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, pllp, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, spms, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, spvid, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, spvm, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, sspr, 0x00, 16, 0x00, 12);
MLXSW_ITEM32_LP(reg, spaft, 0x00, 16, 0x00, 12);