MLX5_CAP_ROCE
!MLX5_CAP_ROCE(mdev, roce_cc_general))
max_gids = MLX5_CAP_ROCE(dev->mdev, roce_address_table_size);
max_gids = MLX5_CAP_ROCE(dev->mdev, roce_address_table_size);
rt_supported(MLX5_CAP_ROCE(dev->mdev, qp_ts_format)))
u8 l3_type_cap = MLX5_CAP_ROCE(dev->mdev, l3_type);
u8 roce_version_cap = MLX5_CAP_ROCE(dev->mdev, roce_version);
props->gid_tbl_len = MLX5_CAP_ROCE(dev->mdev,
return cpu_to_be16(MLX5_CAP_ROCE(dev->mdev, r_roce_min_src_udp_port));
u8 ts_cap = MLX5_CAP_ROCE(dev->mdev, qp_ts_format);
MLX5_CAP_ROCE(mdev, r_roce_min_src_udp_port));
err = mlx5_core_get_caps_mode(dev, MLX5_CAP_ROCE, HCA_CAP_OPMOD_GET_CUR);
unsigned int tblsz = MLX5_CAP_ROCE(dev, roce_address_table_size);
MLX5_CAP_ROCE,
err = mlx5_core_get_caps(dev, MLX5_CAP_ROCE);
if (MLX5_CAP_ROCE(dev, sw_r_roce_src_udp_port) ||
memcpy(set_hca_cap, dev->caps.hca[MLX5_CAP_ROCE]->cur,
MLX5_CAP_ROCE(mdev, fl_rc_qp_when_roce_disabled);
MLX5_CAP_ROCE(mdev, fl_rc_qp_when_roce_enabled);
caps->roce_min_src_udp = MLX5_CAP_ROCE(mdev, r_roce_min_src_udp_port);
MLX5_GET(roce_cap, mdev->caps.hca[MLX5_CAP_ROCE]->cur, cap)
MLX5_GET(roce_cap, mdev->caps.hca[MLX5_CAP_ROCE]->max, cap)
MLX5_CAP_ROCE(dev, qp_ts_format) :