MLX5_CAP_DEV_MEM
u64 num_memic_hw_pages = MLX5_CAP_DEV_MEM(dev, memic_bar_size)
u32 max_alignment = MLX5_CAP_DEV_MEM(dev, log_max_memic_addr_alignment);
if (!(MLX5_CAP_DEV_MEM(dev->mdev, memic_operations) & BIT(op)))
if (!dm_db || !MLX5_CAP_DEV_MEM(dm_db->dev, memic))
if (MLX5_CAP_DEV_MEM(mdev, memic)) {
MLX5_CAP_DEV_MEM(mdev, max_memic_size);
if (MLX5_CAP_DEV_MEM(mdev, memic) ||
err = mlx5_core_get_caps_mode(dev, MLX5_CAP_DEV_MEM, HCA_CAP_OPMOD_GET_CUR);
BIT(MLX5_CAP_DEV_MEM(dev, log_steering_sw_icm_size) -
BIT(MLX5_CAP_DEV_MEM(dev,
BIT(MLX5_CAP_DEV_MEM(dev,
BIT(MLX5_CAP_DEV_MEM(dev,
log_icm_size = MLX5_CAP_DEV_MEM(dev, log_steering_sw_icm_size);
log_icm_size = MLX5_CAP_DEV_MEM(dev,
log_icm_size = MLX5_CAP_DEV_MEM(dev,
log_icm_size = MLX5_CAP_DEV_MEM(dev,
BIT(MLX5_CAP_DEV_MEM(dev, log_steering_sw_icm_size) -
BIT(MLX5_CAP_DEV_MEM(dev, log_header_modify_sw_icm_size) -
if (MLX5_CAP_DEV_MEM(dev, log_indirect_encap_sw_icm_size)) {
BIT(MLX5_CAP_DEV_MEM(dev, log_indirect_encap_sw_icm_size) -
BIT(MLX5_CAP_DEV_MEM(dev, log_header_modify_pattern_sw_icm_size) -
MLX5_CAP_DEV_MEM,
caps->log_icm_size = MLX5_CAP_DEV_MEM(mdev, log_steering_sw_icm_size);
MLX5_CAP_DEV_MEM(mdev, log_header_modify_pattern_sw_icm_size);
MLX5_GET(device_mem_cap, mdev->caps.hca[MLX5_CAP_DEV_MEM]->cur, cap)
MLX5_GET64(device_mem_cap, mdev->caps.hca[MLX5_CAP_DEV_MEM]->cur, cap)
#define MLX5_LOG_SW_ICM_BLOCK_SIZE(dev) (MLX5_CAP_DEV_MEM(dev, log_sw_icm_alloc_granularity))