ASIC_REV_5762
tg3_asic_rev(tp) != ASIC_REV_5762)
tg3_asic_rev(tp) == ASIC_REV_5762 ||
tg3_asic_rev(tp) == ASIC_REV_5762)
tg3_asic_rev(tp) == ASIC_REV_5762)
tg3_asic_rev(tp) == ASIC_REV_5762)
if (tg3_asic_rev(tp) == ASIC_REV_5762)
tg3_asic_rev(tp) == ASIC_REV_5762) {
tg3_asic_rev(tp) == ASIC_REV_5762) {
if (tg3_asic_rev(tp) == ASIC_REV_5762)
tg3_asic_rev(tp) == ASIC_REV_5762) {
if (tg3_asic_rev(tp) == ASIC_REV_5762)
tg3_asic_rev(tp) != ASIC_REV_5762 &&
tg3_asic_rev(tp) == ASIC_REV_5762)
if (tg3_asic_rev(tp) == ASIC_REV_5762) {
if (tg3_asic_rev(tp) != ASIC_REV_5762)
if (tg3_asic_rev(tp) != ASIC_REV_5762)
if (tg3_asic_rev(tp) == ASIC_REV_5762) {
tg3_asic_rev(tp) == ASIC_REV_5762)
tg3_asic_rev(tp) == ASIC_REV_5762)
tg3_asic_rev(tp) == ASIC_REV_5762 ||
if (tg3_asic_rev(tp) != ASIC_REV_5762)
tg3_asic_rev(tp) == ASIC_REV_5762)
tg3_asic_rev(tp) == ASIC_REV_5762)
if (tg3_asic_rev(tp) == ASIC_REV_5762)
tg3_asic_rev(tp) == ASIC_REV_5762 ||
tg3_asic_rev(tp) == ASIC_REV_5762)
tg3_asic_rev(tp) == ASIC_REV_5762)
case ASIC_REV_5762:
tg3_asic_rev(tp) == ASIC_REV_5762)
if (tg3_asic_rev(tp) == ASIC_REV_5762 && mss) {
if (tg3_asic_rev(tp) == ASIC_REV_5762) {
tg3_asic_rev(tp) == ASIC_REV_5762)
tg3_asic_rev(tp) == ASIC_REV_5762 ||