drivers/gpu/drm/i915/gt/gen6_engine_cs.c

221

return gen6_flush_dw(rq, mode, MI_INVALIDATE_TLB);

drivers/gpu/drm/i915/gt/gen6_engine_cs.c

226

return gen6_flush_dw(rq, mode, MI_INVALIDATE_TLB | MI_INVALIDATE_BSD);

drivers/gpu/drm/i915/gt/gen6_engine_cs.c

400

*cs++ = MI_FLUSH_DW | MI_INVALIDATE_TLB |

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

100

cmd |= MI_INVALIDATE_TLB;

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

394

cmd |= MI_INVALIDATE_TLB;

drivers/gpu/drm/xe/xe_migrate.c

1000

xe_sched_job_add_migrate_flush(job, flush_flags | MI_INVALIDATE_TLB);

drivers/gpu/drm/xe/xe_migrate.c

1072

dw[i++] = MI_FLUSH_DW | MI_INVALIDATE_TLB | MI_FLUSH_DW_OP_STOREDW |

drivers/gpu/drm/xe/xe_migrate.c

1365

xe_sched_job_add_migrate_flush(job, MI_INVALIDATE_TLB);

drivers/gpu/drm/xe/xe_migrate.c

1573

flush_flags |= MI_INVALIDATE_TLB;

drivers/gpu/drm/xe/xe_migrate.c

1920

xe_sched_job_add_migrate_flush(job, MI_INVALIDATE_TLB);

drivers/gpu/drm/xe/xe_migrate.c

2206

xe_sched_job_add_migrate_flush(job, MI_INVALIDATE_TLB);

drivers/gpu/drm/xe/xe_ring_ops.c

114

MI_FLUSH_IMM_DW | (flush_flags & MI_INVALIDATE_TLB) ?: 0;

drivers/gpu/drm/xe/xe_ring_ops.c

274

seqno, MI_INVALIDATE_TLB, dw, i);

drivers/gpu/drm/xe/xe_ring_ops.c

341

seqno, MI_INVALIDATE_TLB, dw, i);