MIPS_ISA_REV
#elif !defined(CONFIG_CC_HAS_BROKEN_INLINE_COMPAT_BRANCH) && MIPS_ISA_REV >= 6
if ((MIPS_ISA_REV >= 2) && __builtin_constant_p(bit)) {
} else if ((MIPS_ISA_REV >= 2) && __builtin_constant_p(nr)) {
if ((MIPS_ISA_REV >= 2) && __builtin_constant_p(bit) && (bit >= 16)) {
# if MIPS_ISA_REV >= 2
# define cpu_has_mips_1 (MIPS_ISA_REV < 6)
#define __isa_ge_and_ase(isa, ase) ((MIPS_ISA_REV >= (isa)) && __ase(ase))
#define __isa_ge_and_opt(isa, opt) ((MIPS_ISA_REV >= (isa)) && __opt(opt))
#define __isa_ge_or_ase(isa, ase) ((MIPS_ISA_REV >= (isa)) || __ase(ase))
#define __isa_ge_or_opt(isa, opt) ((MIPS_ISA_REV >= (isa)) || __opt(opt))
#define __isa_lt_and_ase(isa, ase) ((MIPS_ISA_REV < (isa)) && __ase(ase))
#define __isa_lt_and_opt(isa, opt) ((MIPS_ISA_REV < (isa)) && __opt(opt))
#define __isa_ge_and_flag(isa, flag) ((MIPS_ISA_REV >= (isa)) && __isa(flag))
#define __isa_ge_or_flag(isa, flag) ((MIPS_ISA_REV >= (isa)) || __isa(flag))
#define __isa_lt_and_flag(isa, flag) ((MIPS_ISA_REV < (isa)) && __isa(flag))
((MIPS_ISA_REV >= (ge)) && (MIPS_ISA_REV < (lt)))
(__isa_range(ge, lt) || ((MIPS_ISA_REV < (lt)) && __isa(flag)))
#elif MIPS_ISA_REV >= 6
if (MIPS_ISA_REV >= 2) \
#if MIPS_ISA_REV >= 5
#if MIPS_ISA_REV < 6
#if MIPS_ISA_REV > 0
#if MIPS_ISA_REV > 0
if (!IS_ENABLED(CONFIG_CPU_MICROMIPS) && MIPS_ISA_REV >= 6) {
if (MIPS_ISA_REV < 6) {
#if (MIPS_ISA_REV >= 6) || defined(__mips64)