arch/mips/include/asm/msa.h

100

set_c0_config5(MIPS_CONF5_MSAEN);

arch/mips/include/asm/msa.h

108

clear_c0_config5(MIPS_CONF5_MSAEN);

arch/mips/include/asm/msa.h

118

return read_c0_config5() & MIPS_CONF5_MSAEN;

arch/mips/kvm/mips.c

1350

read_c0_config5() & MIPS_CONF5_MSAEN)

arch/mips/kvm/mips.c

1443

set_c0_config5(MIPS_CONF5_MSAEN);

arch/mips/kvm/vz.c

116

mask |= MIPS_CONF5_MSAEN;

arch/mips/kvm/vz.c

1612

!(read_gc0_config5() & MIPS_CONF5_MSAEN) ||

arch/mips/kvm/vz.c

3170

MIPS_CONF5_MSAEN |