Symbol: MIPSInst_RT
arch/mips/kernel/mips-r2-to-r6-emul.c
108
regs->regs[MIPSInst_RT(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
1108
if (MIPSInst_RT(inst)) {
arch/mips/kernel/mips-r2-to-r6-emul.c
116
(s32)(((u32)regs->regs[MIPSInst_RT(ir)]) <<
arch/mips/kernel/mips-r2-to-r6-emul.c
1206
rt = regs->regs[MIPSInst_RT(inst)];
arch/mips/kernel/mips-r2-to-r6-emul.c
125
(s32)(((u32)regs->regs[MIPSInst_RT(ir)]) >>
arch/mips/kernel/mips-r2-to-r6-emul.c
1271
if (MIPSInst_RT(inst) && !err)
arch/mips/kernel/mips-r2-to-r6-emul.c
1272
regs->regs[MIPSInst_RT(inst)] = rt;
arch/mips/kernel/mips-r2-to-r6-emul.c
1279
rt = regs->regs[MIPSInst_RT(inst)];
arch/mips/kernel/mips-r2-to-r6-emul.c
1345
if (MIPSInst_RT(inst) && !err)
arch/mips/kernel/mips-r2-to-r6-emul.c
1346
regs->regs[MIPSInst_RT(inst)] = rt;
arch/mips/kernel/mips-r2-to-r6-emul.c
135
(u32)regs->regs[MIPSInst_RT(ir)]);
arch/mips/kernel/mips-r2-to-r6-emul.c
1353
rt = regs->regs[MIPSInst_RT(inst)];
arch/mips/kernel/mips-r2-to-r6-emul.c
1423
rt = regs->regs[MIPSInst_RT(inst)];
arch/mips/kernel/mips-r2-to-r6-emul.c
144
(u32)regs->regs[MIPSInst_RT(ir)]);
arch/mips/kernel/mips-r2-to-r6-emul.c
1498
rt = regs->regs[MIPSInst_RT(inst)];
arch/mips/kernel/mips-r2-to-r6-emul.c
152
(s64)(((u64)regs->regs[MIPSInst_RT(ir)]) <<
arch/mips/kernel/mips-r2-to-r6-emul.c
1605
if (MIPSInst_RT(inst) && !err)
arch/mips/kernel/mips-r2-to-r6-emul.c
1606
regs->regs[MIPSInst_RT(inst)] = rt;
arch/mips/kernel/mips-r2-to-r6-emul.c
161
(s64)(((u64)regs->regs[MIPSInst_RT(ir)]) >>
arch/mips/kernel/mips-r2-to-r6-emul.c
1617
rt = regs->regs[MIPSInst_RT(inst)];
arch/mips/kernel/mips-r2-to-r6-emul.c
171
(u64)regs->regs[MIPSInst_RT(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
1724
if (MIPSInst_RT(inst) && !err)
arch/mips/kernel/mips-r2-to-r6-emul.c
1725
regs->regs[MIPSInst_RT(inst)] = rt;
arch/mips/kernel/mips-r2-to-r6-emul.c
1736
rt = regs->regs[MIPSInst_RT(inst)];
arch/mips/kernel/mips-r2-to-r6-emul.c
180
(u64)regs->regs[MIPSInst_RT(ir)]);
arch/mips/kernel/mips-r2-to-r6-emul.c
1854
rt = regs->regs[MIPSInst_RT(inst)];
arch/mips/kernel/mips-r2-to-r6-emul.c
2016
if (MIPSInst_RT(inst) && !err)
arch/mips/kernel/mips-r2-to-r6-emul.c
2017
regs->regs[MIPSInst_RT(inst)] = res;
arch/mips/kernel/mips-r2-to-r6-emul.c
205
cond = fpucondbit[MIPSInst_RT(ir) >> 2];
arch/mips/kernel/mips-r2-to-r6-emul.c
2055
res = regs->regs[MIPSInst_RT(inst)];
arch/mips/kernel/mips-r2-to-r6-emul.c
2073
if (MIPSInst_RT(inst) && !err)
arch/mips/kernel/mips-r2-to-r6-emul.c
2074
regs->regs[MIPSInst_RT(inst)] = res;
arch/mips/kernel/mips-r2-to-r6-emul.c
2134
if (MIPSInst_RT(inst) && !err)
arch/mips/kernel/mips-r2-to-r6-emul.c
2135
regs->regs[MIPSInst_RT(inst)] = res;
arch/mips/kernel/mips-r2-to-r6-emul.c
2179
res = regs->regs[MIPSInst_RT(inst)];
arch/mips/kernel/mips-r2-to-r6-emul.c
2197
if (MIPSInst_RT(inst) && !err)
arch/mips/kernel/mips-r2-to-r6-emul.c
2198
regs->regs[MIPSInst_RT(inst)] = res;
arch/mips/kernel/mips-r2-to-r6-emul.c
228
cond = fpucondbit[MIPSInst_RT(ir) >> 2];
arch/mips/kernel/mips-r2-to-r6-emul.c
306
if (((regs->regs[MIPSInst_RT(ir)]) == 0) && MIPSInst_RD(ir))
arch/mips/kernel/mips-r2-to-r6-emul.c
322
if (((regs->regs[MIPSInst_RT(ir)]) != 0) && MIPSInst_RD(ir))
arch/mips/kernel/mips-r2-to-r6-emul.c
407
rt = regs->regs[MIPSInst_RT(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
434
rt = regs->regs[MIPSInst_RT(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
457
rt = regs->regs[MIPSInst_RT(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
479
rt = regs->regs[MIPSInst_RT(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
505
rt = regs->regs[MIPSInst_RT(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
537
rt = regs->regs[MIPSInst_RT(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
568
rt = regs->regs[MIPSInst_RT(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
593
rt = regs->regs[MIPSInst_RT(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
638
rt = regs->regs[MIPSInst_RT(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
667
rt = regs->regs[MIPSInst_RT(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
696
rt = regs->regs[MIPSInst_RT(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
725
rt = regs->regs[MIPSInst_RT(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
756
rt = regs->regs[MIPSInst_RT(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
82
if (MIPSInst_RT(ir))
arch/mips/kernel/mips-r2-to-r6-emul.c
83
regs->regs[MIPSInst_RT(ir)] =
arch/mips/kernel/mips-r2-to-r6-emul.c
91
if (MIPSInst_RT(ir))
arch/mips/kernel/mips-r2-to-r6-emul.c
92
regs->regs[MIPSInst_RT(ir)] =
arch/mips/kernel/mips-r2-to-r6-emul.c
940
rt = MIPSInst_RT(inst);
arch/mips/math-emu/cp1emu.c
1064
DITOREG(dval, MIPSInst_RT(ir));
arch/mips/math-emu/cp1emu.c
1071
DIFROMREG(dval, MIPSInst_RT(ir));
arch/mips/math-emu/cp1emu.c
1098
SITOREG(wval, MIPSInst_RT(ir));
arch/mips/math-emu/cp1emu.c
1105
SIFROMREG(wval, MIPSInst_RT(ir));
arch/mips/math-emu/cp1emu.c
1125
if (MIPSInst_RT(ir) != 0) {
arch/mips/math-emu/cp1emu.c
1126
DIFROMREG(xcp->regs[MIPSInst_RT(ir)],
arch/mips/math-emu/cp1emu.c
1136
DITOREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir));
arch/mips/math-emu/cp1emu.c
1144
if (MIPSInst_RT(ir) != 0) {
arch/mips/math-emu/cp1emu.c
1145
SIFROMHREG(xcp->regs[MIPSInst_RT(ir)],
arch/mips/math-emu/cp1emu.c
1155
SITOHREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir));
arch/mips/math-emu/cp1emu.c
1160
if (MIPSInst_RT(ir) != 0) {
arch/mips/math-emu/cp1emu.c
1161
SIFROMREG(xcp->regs[MIPSInst_RT(ir)],
arch/mips/math-emu/cp1emu.c
1168
SITOREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir));
arch/mips/math-emu/cp1emu.c
1191
fpr = &current->thread.fpu.fpr[MIPSInst_RT(ir)];
arch/mips/math-emu/cp1emu.c
1210
cbit = fpucondbit[MIPSInst_RT(ir) >> 2];
arch/mips/math-emu/cp1emu.c
1216
switch (MIPSInst_RT(ir) & 3) {
arch/mips/math-emu/cp1emu.c
1374
cond = fpucondbit[MIPSInst_RT(ir) >> 2];
arch/mips/math-emu/cp1emu.c
1375
if (((ctx->fcr31 & cond) != 0) == ((MIPSInst_RT(ir) & 1) != 0))
arch/mips/math-emu/cp1emu.c
858
(void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
arch/mips/math-emu/cp1emu.c
868
(void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
arch/mips/math-emu/cp1emu.c
876
(void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
arch/mips/math-emu/cp1emu.c
887
(void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
arch/mips/math-emu/cp1emu.c
898
if (MIPSInst_RT(ir))
arch/mips/math-emu/cp1emu.c
899
xcp->regs[MIPSInst_RT(ir)] = value;
arch/mips/math-emu/cp1emu.c
912
if (MIPSInst_RT(ir) == 0)
arch/mips/math-emu/cp1emu.c
915
value = xcp->regs[MIPSInst_RT(ir)];
arch/mips/math-emu/cp1emu.c
920
(void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
arch/mips/math-emu/cp1emu.c
931
(void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
arch/mips/math-emu/cp1emu.c
942
(void *)xcp->cp0_epc, MIPSInst_RT(ir), value);
arch/mips/math-emu/cp1emu.c
951
(void *)xcp->cp0_epc, MIPSInst_RT(ir), value);