MIPSInst_RS
regs->regs[MIPSInst_RS(ir)] |
if (MIPSInst_RS(ir))
if (MIPSInst_RS(ir))
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
(s32)((u32)regs->regs[MIPSInst_RS(ir)] +
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
(s32)((u32)regs->regs[MIPSInst_RS(ir)] -
if (IS_ENABLED(CONFIG_32BIT) || MIPSInst_RS(ir))
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
if (IS_ENABLED(CONFIG_32BIT) || MIPSInst_RS(ir))
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
(u64)regs->regs[MIPSInst_RS(ir)] +
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
(s64)((u64)regs->regs[MIPSInst_RS(ir)] -
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
regs->regs[MIPSInst_RD(ir)] = regs->regs[MIPSInst_RS(ir)];
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
regs->regs[MIPSInst_RD(ir)] = regs->regs[MIPSInst_RS(ir)];
regs->regs[MIPSInst_RD(ir)] = regs->regs[MIPSInst_RS(ir)];
regs->regs[MIPSInst_RD(ir)] = regs->regs[MIPSInst_RS(ir)];
regs->hi = regs->regs[MIPSInst_RS(ir)];
regs->lo = regs->regs[MIPSInst_RS(ir)];
rs = regs->regs[MIPSInst_RS(ir)];
rs = regs->regs[MIPSInst_RS(ir)];
rs = regs->regs[MIPSInst_RS(ir)];
rs = regs->regs[MIPSInst_RS(ir)];
rs = regs->regs[MIPSInst_RS(ir)];
rs = regs->regs[MIPSInst_RS(ir)];
rs = regs->regs[MIPSInst_RS(ir)];
rs = regs->regs[MIPSInst_RS(ir)];
rs = regs->regs[MIPSInst_RS(ir)];
rs = regs->regs[MIPSInst_RS(ir)];
rs = regs->regs[MIPSInst_RS(ir)];
rs = regs->regs[MIPSInst_RS(ir)];
rs = regs->regs[MIPSInst_RS(ir)];
rs = regs->regs[MIPSInst_RS(ir)];
rs = regs->regs[MIPSInst_RS(ir)];
rs = regs->regs[MIPSInst_RS(ir)];
(s32)regs->regs[MIPSInst_RS(ir)] +
rs = regs->regs[MIPSInst_RS(ir)];
(s64)regs->regs[MIPSInst_RS(ir)] +
rs = MIPSInst_RS(inst);
dva = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] +
dva = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] +
wva = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] +
wva = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] +
switch (MIPSInst_RS(ir)) {
switch (MIPSInst_RS(ir)) {
if (!(MIPSInst_RS(ir) & 0x10))
xcp->regs[MIPSInst_RS(ir)];