Symbol: MIPSInst_RS
arch/mips/kernel/mips-r2-to-r6-emul.c
107
regs->regs[MIPSInst_RS(ir)] |
arch/mips/kernel/mips-r2-to-r6-emul.c
111
if (MIPSInst_RS(ir))
arch/mips/kernel/mips-r2-to-r6-emul.c
120
if (MIPSInst_RS(ir))
arch/mips/kernel/mips-r2-to-r6-emul.c
1207
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
arch/mips/kernel/mips-r2-to-r6-emul.c
1280
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
arch/mips/kernel/mips-r2-to-r6-emul.c
134
(s32)((u32)regs->regs[MIPSInst_RS(ir)] +
arch/mips/kernel/mips-r2-to-r6-emul.c
1354
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
arch/mips/kernel/mips-r2-to-r6-emul.c
1424
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
arch/mips/kernel/mips-r2-to-r6-emul.c
143
(s32)((u32)regs->regs[MIPSInst_RS(ir)] -
arch/mips/kernel/mips-r2-to-r6-emul.c
147
if (IS_ENABLED(CONFIG_32BIT) || MIPSInst_RS(ir))
arch/mips/kernel/mips-r2-to-r6-emul.c
1499
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
arch/mips/kernel/mips-r2-to-r6-emul.c
156
if (IS_ENABLED(CONFIG_32BIT) || MIPSInst_RS(ir))
arch/mips/kernel/mips-r2-to-r6-emul.c
1618
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
arch/mips/kernel/mips-r2-to-r6-emul.c
170
(u64)regs->regs[MIPSInst_RS(ir)] +
arch/mips/kernel/mips-r2-to-r6-emul.c
1737
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
arch/mips/kernel/mips-r2-to-r6-emul.c
179
(s64)((u64)regs->regs[MIPSInst_RS(ir)] -
arch/mips/kernel/mips-r2-to-r6-emul.c
1855
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
arch/mips/kernel/mips-r2-to-r6-emul.c
1967
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
arch/mips/kernel/mips-r2-to-r6-emul.c
2023
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
arch/mips/kernel/mips-r2-to-r6-emul.c
208
regs->regs[MIPSInst_RD(ir)] = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
2086
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
arch/mips/kernel/mips-r2-to-r6-emul.c
2147
vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
arch/mips/kernel/mips-r2-to-r6-emul.c
231
regs->regs[MIPSInst_RD(ir)] = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
307
regs->regs[MIPSInst_RD(ir)] = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
323
regs->regs[MIPSInst_RD(ir)] = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
355
regs->hi = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
388
regs->lo = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
408
rs = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
435
rs = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
458
rs = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
480
rs = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
506
rs = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
538
rs = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
569
rs = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
594
rs = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
639
rs = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
668
rs = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
697
rs = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
726
rs = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
757
rs = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
783
rs = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
808
rs = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
835
rs = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
84
(s32)regs->regs[MIPSInst_RS(ir)] +
arch/mips/kernel/mips-r2-to-r6-emul.c
862
rs = regs->regs[MIPSInst_RS(ir)];
arch/mips/kernel/mips-r2-to-r6-emul.c
93
(s64)regs->regs[MIPSInst_RS(ir)] +
arch/mips/kernel/mips-r2-to-r6-emul.c
941
rs = MIPSInst_RS(inst);
arch/mips/math-emu/cp1emu.c
1050
dva = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] +
arch/mips/math-emu/cp1emu.c
1068
dva = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] +
arch/mips/math-emu/cp1emu.c
1085
wva = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] +
arch/mips/math-emu/cp1emu.c
1102
wva = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] +
arch/mips/math-emu/cp1emu.c
1119
switch (MIPSInst_RS(ir)) {
arch/mips/math-emu/cp1emu.c
1193
switch (MIPSInst_RS(ir)) {
arch/mips/math-emu/cp1emu.c
1349
if (!(MIPSInst_RS(ir) & 0x10))
arch/mips/math-emu/cp1emu.c
1377
xcp->regs[MIPSInst_RS(ir)];