AR_SREV_9485
if (!AR_SREV_9300_20_OR_LATER(ah) || AR_SREV_9485(ah) ||
if (!AR_SREV_9485(ah)) {
if (!AR_SREV_9485(ah)) {
if (AR_SREV_9485(ah))
if ((!AR_SREV_9485(ah) && length >= 1024) ||
(AR_SREV_9485(ah) && length > EEPROM_DATA_LEN_9485) ||
if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah) ||
if (AR_SREV_9485(ah) && (ar9003_hw_get_rx_gain_idx(ah) == 0)) {
if (AR_SREV_9485(ah) && common->bt_ant_diversity) {
if (AR_SREV_9330(ah) || AR_SREV_9485(ah) || AR_SREV_9565(ah)) {
if (AR_SREV_9485(ah) && common->bt_ant_diversity)
if ((AR_SREV_9485(ah) || AR_SREV_9565(ah))
if (AR_SREV_9485(ah) &&
if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) {
if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) {
if (AR_SREV_9485(ah)) {
if (AR_SREV_9485(ah) ||
} else if (AR_SREV_9485(ah)) {
if (!AR_SREV_9485(ah) && !AR_SREV_9330(ah))
if (AR_SREV_9485(ah)) {
if (AR_SREV_9485(ah))
} else if (AR_SREV_9485(ah)) {
if (!AR_SREV_9485(ah) && !AR_SREV_9565(ah))
if (AR_SREV_9485(ah)) {
if (AR_SREV_9330(ah) || AR_SREV_9485(ah) ||
if (AR_SREV_9485(ah) || AR_SREV_9340(ah) || AR_SREV_9330(ah) ||
if (AR_SREV_9485(ah) || AR_SREV_9340(ah) || AR_SREV_9330(ah) ||
#define AR_PHY_PAPRD_TRAINER_CNTL1(_ah) (AR_SM_BASE + (AR_SREV_9485(_ah) ? 0x580 : 0x490))
#define AR_PHY_PAPRD_TRAINER_CNTL2(_ah) (AR_SM_BASE + (AR_SREV_9485(_ah) ? 0x584 : 0x494))
#define AR_PHY_PAPRD_TRAINER_CNTL3(_ah) (AR_SM_BASE + (AR_SREV_9485(_ah) ? 0x588 : 0x498))
#define AR_PHY_PAPRD_TRAINER_CNTL4(_ah) (AR_SM_BASE + (AR_SREV_9485(_ah) ? 0x58c : 0x49c))
#define AR_PHY_PAPRD_TRAINER_STAT1(_ah) (AR_SM_BASE + (AR_SREV_9485(_ah) ? 0x590 : 0x4a0))
#define AR_PHY_PAPRD_TRAINER_STAT2(_ah) (AR_SM_BASE + (AR_SREV_9485(_ah) ? 0x594 : 0x4a4))
#define AR_PHY_PAPRD_TRAINER_STAT3(_ah) (AR_SM_BASE + (AR_SREV_9485(_ah) ? 0x598 : 0x4a8))
#define AR_PHY_TX_IQCAL_CONTROL_0(_ah) (AR_SM_BASE + (AR_SREV_9485(_ah) ? \
#define AR_PHY_TX_IQCAL_CONTROL_1(_ah) (AR_SM_BASE + (AR_SREV_9485(_ah) ? \
#define AR_PHY_TX_IQCAL_START(_ah) (AR_SM_BASE + (AR_SREV_9485(_ah) ? \
#define AR_PHY_TX_IQCAL_STATUS_B0(_ah) (AR_SM_BASE + (AR_SREV_9485(_ah) ? \
(AR_SREV_9485(_ah) ? \
if (AR_SREV_9462(ah) || AR_SREV_9565(ah) || AR_SREV_9485(ah)) {
} else if (AR_SREV_9485(ah)){
if (AR_SREV_9271(ah) || AR_SREV_9330(ah) || AR_SREV_9485(ah) || AR_SREV_9565(ah))
else if (AR_SREV_9485(ah))
} else if (AR_SREV_9485(ah)) {
if (AR_SREV_9485(ah) ||
if (!AR_SREV_9330(ah) && !AR_SREV_9485(ah) &&
if (AR_SREV_9330(ah) || AR_SREV_9485(ah) || AR_SREV_9565(ah)) {
if (AR_SREV_9485(ah) || AR_SREV_9565(ah)) {
if (AR_SREV_9485(ah) || AR_SREV_9340(ah) || AR_SREV_9330(ah) ||
(AR_SREV_9462(_ah) || AR_SREV_9485(_ah) || AR_SREV_9565(_ah))
(AR_SREV_9485(_ah) && \