MC_SEQ_MISC0
tmp = RREG32(MC_SEQ_MISC0);
dram_refresh_rate = 1 << ((RREG32(MC_SEQ_MISC0) & 0x3) + 3);
tmp = RREG32(MC_SEQ_MISC0);
tmp = RREG32(MC_SEQ_MISC0);
tmp = RREG32(MC_SEQ_MISC0);
tmp = RREG32(MC_SEQ_MISC0);
mem_type = (RREG32(MC_SEQ_MISC0) & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT;
tmp = RREG32(MC_SEQ_MISC0);
tmp = RREG32(MC_SEQ_MISC0) & 3;
if (((RREG32(MC_SEQ_MISC0) & 0xff000000) >> 24) == 0x58)
tmp = RREG32(MC_SEQ_MISC0);
tmp = RREG32(MC_SEQ_MISC0);
dram_refresh_rate = 1 << ((RREG32(MC_SEQ_MISC0) & 0x3) + 3);