MC_SEQ_CAS_TIMING
case MC_SEQ_CAS_TIMING:
WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING));
case MC_SEQ_CAS_TIMING >> 2:
WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING));
case MC_SEQ_CAS_TIMING >> 2:
case MC_SEQ_CAS_TIMING:
WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING));
eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_CAS_TIMING >> 2;
case MC_SEQ_CAS_TIMING >> 2:
WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING));
case MC_SEQ_CAS_TIMING >> 2:
WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING));