MCS_RX
mcs->mcs_ops->mcs_bbe_intr_handler(mcs, bbe_intr, MCS_RX);
mcs->mcs_ops->mcs_pab_intr_handler(mcs, pab_intr, MCS_RX);
reg = (req->dir == MCS_RX) ? MCSX_PEX_RX_SLAVE_CUSTOM_TAGX(idx) :
reg = (req->dir == MCS_RX) ? MCSX_PEX_RX_SLAVE_VLAN_CFGX(idx) :
reg = (req->dir == MCS_RX) ? MCSX_PEX_RX_SLAVE_ETYPE_ENABLE :
if (pn->dir == MCS_RX)
if (dir == MCS_RX)
if (dir == MCS_RX) {
if (dir == MCS_RX) {
if (dir == MCS_RX) {
if (dir == MCS_RX)
if (dir == MCS_RX)
if (dir == MCS_RX)
if (dir == MCS_RX)
if (dir == MCS_RX) {
if (dir == MCS_RX)
if (mcs->hw->mcs_blks == 1 && dir == MCS_RX)
if (dir == MCS_RX) {
if (dir == MCS_RX) {
if (dir == MCS_RX) {
mcs_secy_plcy_write(mcs, plcy, secy_id, MCS_RX);
mcs->mcs_ops->mcs_flowid_secy_map(mcs, &map, MCS_RX);
mcs_ena_dis_flowid_entry(mcs, flow_id, MCS_RX, true);
if (dir == MCS_RX)
reg = (req->dir == MCS_RX) ? MCSX_PEX_RX_SLAVE_RULE_ENABLE : MCSX_PEX_TX_SLAVE_RULE_ENABLE;
map = (req->dir == MCS_RX) ? &mcs->rx : &mcs->tx;
reg = (req->dir == MCS_RX) ? MCSX_PEX_RX_SLAVE_RULE_ETYPE_CFGX(idx) :
reg = (req->dir == MCS_RX) ? MCSX_PEX_RX_SLAVE_RULE_DAX(idx) :
if (req->dir == MCS_RX) {
if (req->dir == MCS_RX) {
reg = (req->dir == MCS_RX) ? MCSX_PEX_RX_SLAVE_RULE_MAC :
reg = (req->dir == MCS_RX) ? MCSX_PEX_RX_SLAVE_RULE_ENABLE : MCSX_PEX_TX_SLAVE_RULE_ENABLE;
if (dir == MCS_RX)
if (dir == MCS_RX)
if (dir == MCS_RX)
reg = (dir == MCS_RX) ? MCSX_BBE_RX_SLAVE_DFIFO_OVERFLOW_0 :
reg = (dir == MCS_RX) ? MCSX_BBE_RX_SLAVE_PLFIFO_OVERFLOW_0 :
event.intr_mask = (dir == MCS_RX) ?
event.intr_mask = (dir == MCS_RX) ?
event.intr_mask = (dir == MCS_RX) ?
if (dir == MCS_RX) {
if (req->dir == MCS_RX)
mcs_free_all_rsrc(mcs, MCS_RX, pcifunc);
mcs_free_all_rsrc(mcs, MCS_RX, pcifunc);
if (req->dir == MCS_RX)
if (req->dir == MCS_RX)
if (req->dir == MCS_RX)
map = (req->dir == MCS_RX) ? &mcs->rx : &mcs->tx;
if (dir == MCS_RX && mcs->hw->mcs_blks > 1)
return rvu_dbg_mcs_port_stats_display(filp, unused, MCS_RX);
mcs_get_sa_stats(mcs, &stats, sa_id, MCS_RX);
return rvu_dbg_mcs_sa_stats_display(filp, unused, MCS_RX);
mcs_get_sc_stats(mcs, &stats, sc_id, MCS_RX);
if (dir == MCS_RX)
return rvu_dbg_mcs_flowid_stats_display(filp, unused, MCS_RX);
cn10k_mcs_free_rsrc(pfvf, MCS_RX, MCS_RSRC_TYPE_FLOWID,
cn10k_mcs_free_rsrc(pfvf, MCS_RX, MCS_RSRC_TYPE_SC,
cn10k_mcs_free_rsrc(pfvf, MCS_RX, MCS_RSRC_TYPE_FLOWID,
false, MCS_RX);
cn10k_mcs_secy_stats(pfvf, txsc->hw_secy_id_rx, &rx_rsp, MCS_RX, true);
cn10k_mcs_sc_stats(pfvf, rxsc->hw_sc_id, &sc_rsp, MCS_RX, true);
enable, MCS_RX);
cn10k_mcs_ena_dis_flowid(pfvf, rxsc->hw_flow_id, false, MCS_RX);
cn10k_mcs_secy_stats(pfvf, txsc->hw_secy_id_rx, &rx_rsp, MCS_RX, true);
cn10k_mcs_sc_stats(pfvf, rxsc->hw_sc_id, &rsp, MCS_RX, true);
cn10k_mcs_sa_stats(pfvf, rxsc->hw_sa_id[sa_num], &rsp, MCS_RX, false);
cn10k_mcs_free_rsrc(pfvf, MCS_RX, MCS_RSRC_TYPE_SECY, 0, true);
return cn10k_mcs_alloc_rsrc(pfvf, MCS_RX, MCS_RSRC_TYPE_SA, hw_sa_id);
cn10k_mcs_free_rsrc(pfvf, MCS_RX, MCS_RSRC_TYPE_SA, hw_sa_id, false);
req->dir = MCS_RX;
req->dir = MCS_RX;
plcy_req->dir = MCS_RX;
req->dir = MCS_RX;
ret = cn10k_mcs_alloc_rsrc(pfvf, MCS_RX, MCS_RSRC_TYPE_SECY,
cn10k_mcs_free_rsrc(pfvf, MCS_RX, MCS_RSRC_TYPE_SECY,
cn10k_mcs_free_rsrc(pfvf, MCS_RX, MCS_RSRC_TYPE_SECY,
ret = cn10k_mcs_alloc_rsrc(pfvf, MCS_RX, MCS_RSRC_TYPE_FLOWID,
ret = cn10k_mcs_alloc_rsrc(pfvf, MCS_RX, MCS_RSRC_TYPE_SC,