AR_WA_D3_L1_DISABLE
if (ah->config.pcie_waen & AR_WA_D3_L1_DISABLE)
val |= AR_WA_D3_L1_DISABLE;
if (AR9285_WA_DEFAULT & AR_WA_D3_L1_DISABLE)
val |= AR_WA_D3_L1_DISABLE;
if (AR9280_WA_DEFAULT & AR_WA_D3_L1_DISABLE)
val |= AR_WA_D3_L1_DISABLE;
val &= (~AR_WA_D3_L1_DISABLE);
val &= (~AR_WA_D3_L1_DISABLE);
val &= (~AR_WA_D3_L1_DISABLE);
REG_WRITE(ah, AR_WA(ah), ah->WARegVal & ~AR_WA_D3_L1_DISABLE);
REG_WRITE(ah, AR_WA(ah), ah->WARegVal & ~AR_WA_D3_L1_DISABLE);
ah->WARegVal |= (AR_WA_D3_L1_DISABLE |