AR_SREV_9565
AR_SREV_9565(ah) || AR_SREV_9561(ah))
if (AR_SREV_9565(ah) &&
if (AR_SREV_9565(ah))
else if (AR_SREV_9462(ah) || AR_SREV_9550(ah) || AR_SREV_9565(ah))
if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
if (AR_SREV_9462_20_OR_LATER(ah) || AR_SREV_9565(ah)) {
if (AR_SREV_9330(ah) || AR_SREV_9485(ah) || AR_SREV_9565(ah)) {
if (AR_SREV_9565(ah)) {
if ((AR_SREV_9485(ah) || AR_SREV_9565(ah))
} else if (AR_SREV_9462(ah) || AR_SREV_9565(ah) ||
} else if (AR_SREV_9462(ah) || AR_SREV_9565(ah))
!AR_SREV_9462(ah) && !AR_SREV_9565(ah)) {
} else if (AR_SREV_9565(ah)) {
else if (AR_SREV_9565(ah))
else if (AR_SREV_9565(ah))
else if (AR_SREV_9565(ah))
else if (AR_SREV_9565(ah))
else if (AR_SREV_9565(ah))
else if (AR_SREV_9565(ah))
desc_len = ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x18 : 0x17);
if (AR_SREV_9565(ah))
if (!AR_SREV_9565(ah))
if (AR_SREV_9565(ah)) {
if (AR_SREV_9462(ah) || AR_SREV_9565(ah))
AR_SREV_9565(ah) ||
if (IS_CHAN_2GHZ(ah->curchan) && !AR_SREV_9462(ah) && !AR_SREV_9565(ah))
AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
if (AR_SREV_9462(ah) || AR_SREV_9565(ah))
if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
} else if (AR_SREV_9565(ah)) {
if (!AR_SREV_9485(ah) && !AR_SREV_9565(ah))
AR_SREV_9561(ah) || AR_SREV_9565(ah)) {
} else if (AR_SREV_9565(ah)) {
if (AR_SREV_9565(ah))
if (!(AR_SREV_9565(ah) && range == 10 && synth_freq == 2437))
if (AR_SREV_9565(ah) && (i < 4)) {
if (!AR_SREV_9565(ah))
if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
#define AR_PHY_SYNTH4_LONG_SHIFT_SELECT ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x00000001 : 0x00000002)
#define AR_PHY_SYNTH4_LONG_SHIFT_SELECT_S ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0 : 1)
(((AR_SREV_9462(_ah) || AR_SREV_9565(_ah)) ? 0x1628c : 0x16280)))
((AR_SREV_9462(_ah) || AR_SREV_9565(_ah)) ? 0x16294 : 0x1628c))
((AR_SREV_9462(_ah) || AR_SREV_9565(_ah)) ? 0x16298 : \
#define AR_PHY_PMU1(_ah) ((AR_SREV_9462(_ah) || AR_SREV_9565(_ah)) ? 0x16340 : \
#define AR_PHY_PMU2(_ah) ((AR_SREV_9462(_ah) || AR_SREV_9565(_ah)) ? 0x16344 : \
if (AR_SREV_9462_20_OR_LATER(ah) || AR_SREV_9565(ah)) {
if (AR_SREV_9462(ah) || AR_SREV_9565(ah) || AR_SREV_9485(ah)) {
if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
if (AR_SREV_9271(ah) || AR_SREV_9330(ah) || AR_SREV_9485(ah) || AR_SREV_9565(ah))
#define EEP_RFSILENT_GPIO_SEL ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x00fc : 0x001c)
else if (AR_SREV_9462(ah) || AR_SREV_9565(ah))
if (AR_SREV_9565(ah) && common->bt_ant_diversity)
if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
} else if (AR_SREV_9565(ah)) {
AR_SREV_9565(ah))
!AR_SREV_9561(ah) && !AR_SREV_9565(ah))
if (AR_SREV_9330(ah) || AR_SREV_9485(ah) || AR_SREV_9565(ah)) {
if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
if (AR_SREV_9462(ah) || AR_SREV_9565(ah))
if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
if (AR_SREV_9462(ah) || AR_SREV_9565(ah))
if (AR_SREV_9565(ah)) {
if (AR_SREV_9485(ah) || AR_SREV_9565(ah)) {
if (AR_SREV_9565(ah))
btcoex->duty_cycle = AR_SREV_9565(sc->sc_ah) ? 40 : 35;
if (AR_SREV_9462(sc->sc_ah) || AR_SREV_9565(sc->sc_ah))
(AR_SREV_9462(_ah) || AR_SREV_9485(_ah) || AR_SREV_9565(_ah))
(AR_SREV_9565(_ah) && \
(AR_SREV_9565(_ah) && \
(AR_SREV_9565(_ah) && \
(AR_SREV_9565(_ah) && \