arch/m68k/coldfire/intc-5272.c

169

writel(0x88888888, MCFSIM_ICR4);

arch/m68k/coldfire/intc-5272.c

70

/*MCF_IRQ_QSPI*/ { .icr = MCFSIM_ICR4, .index = 28, .ack = 0, },

arch/m68k/coldfire/intc-5272.c

71

/*MCF_IRQ_EINT5*/ { .icr = MCFSIM_ICR4, .index = 24, .ack = 1, },

arch/m68k/coldfire/intc-5272.c

72

/*MCF_IRQ_EINT6*/ { .icr = MCFSIM_ICR4, .index = 20, .ack = 1, },

arch/m68k/coldfire/intc-5272.c

73

/*MCF_IRQ_SWTO*/ { .icr = MCFSIM_ICR4, .index = 16, .ack = 0, },

arch/m68k/include/asm/m525xsim.h

148

#define MCFSIM_UART1ICR MCFSIM_ICR4 /* UART 1 ICR */

arch/m68k/include/asm/m5307sim.h

153

#define MCFSIM_UART1ICR MCFSIM_ICR4 /* UART 1 ICR */

arch/m68k/include/asm/m53xxsim.h

70

#define MCFSIM_UART1ICR MCFSIM_ICR4 /* UART 1 ICR */

arch/m68k/include/asm/m5407sim.h

117

#define MCFSIM_UART1ICR MCFSIM_ICR4 /* UART 1 ICR */