AR_SM1_BASE
#define AR_PHY_TPC_11_B1 (AR_SM1_BASE + 0x220)
#define AR_PHY_SWITCH_CHAIN_1 (AR_SM1_BASE + 0x84)
#define AR_PHY_FCAL_2_1 (AR_SM1_BASE + 0xd0)
#define AR_PHY_DFT_TONE_CTL_1 (AR_SM1_BASE + 0xd4)
#define AR_PHY_CL_TAB_1 (AR_SM1_BASE + 0x100)
#define AR_PHY_CHAN_INFO_GAIN_1 (AR_SM1_BASE + 0x180)
#define AR_PHY_TPC_4_B1 (AR_SM1_BASE + 0x204)
#define AR_PHY_TPC_5_B1 (AR_SM1_BASE + 0x208)
#define AR_PHY_TPC_6_B1 (AR_SM1_BASE + 0x20c)
#define AR_PHY_TPC_11_B1 (AR_SM1_BASE + 0x220)
#define AR_PHY_PDADC_TAB_1(_ah) (AR_SM1_BASE + (AR_SREV_9462_20_OR_LATER(_ah) ? \
#define AR_PHY_TPC_19_B1 (AR_SM1_BASE + 0x240)
#define AR_PHY_TX_IQCAL_STATUS_B1 (AR_SM1_BASE + 0x48c)
#define AR_PHY_TX_IQCAL_CORR_COEFF_B1(_i) (AR_SM1_BASE + 0x450 + ((_i) << 2))
AR_SM1_BASE : AR_SM_BASE))
AR_SM1_BASE : AR_SM_BASE))
#define AR_PHY_AIC_CTRL_0_B1 (AR_SM1_BASE + 0x4b0)
#define AR_PHY_AIC_CTRL_1_B1 (AR_SM1_BASE + 0x4b4)
#define AR_PHY_AIC_CTRL_4_B1 (AR_SM1_BASE + 0x4c0)
#define AR_PHY_AIC_STAT_0_B1 (AR_SM1_BASE + 0x4c4)
#define AR_PHY_AIC_STAT_1_B1 (AR_SM1_BASE + 0x4c8)
#define AR_PHY_AIC_STAT_2_B1 (AR_SM1_BASE + 0x4cc)
#define AR_PHY_AIC_SRAM_ADDR_B1 (AR_SM1_BASE + 0x5f0)
#define AR_PHY_AIC_SRAM_DATA_B1 (AR_SM1_BASE + 0x5f4)