MA_TARGET_MEM_ENABLE_A
value = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
value = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
value = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
value = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
value = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
lo = t4_read_reg(padap, MA_TARGET_MEM_ENABLE_A);
i = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
if (t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A) & HMA_MUX_F) {
int i = csio_rd_reg32(hw, MA_TARGET_MEM_ENABLE_A);
i = csio_rd_reg32(hw, MA_TARGET_MEM_ENABLE_A);
io = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);