AR_PHY_TIMING_CTRL4
tmp = REG_READ(ah, AR_PHY_TIMING_CTRL4(0));
REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0), new);
REG_CLR_BIT(ah, AR_PHY_TIMING_CTRL4(0),
REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i),
REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i),
REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4(0),
REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(0),
REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4(0),
if (!(REG_READ(ah, AR_PHY_TIMING_CTRL4(0)) &
tmp = REG_READ(ah, AR_PHY_TIMING_CTRL4(0));
REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0), newVal);
REG_RMW(ah, AR_PHY_TIMING_CTRL4(0),
REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset,
(REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset)
REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset,
(REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset) &