AR_PHY_SWITCH_COM
REG_WRITE(ah, AR_PHY_SWITCH_COM, ATH_BT_COEX_ANT_DIV_SWITCH_COM);
REG_WRITE(ah, AR_PHY_SWITCH_COM, 0);
REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM,
REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM,
REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM,
REG_WRITE(ah, AR_PHY_SWITCH_COM, le32_to_cpu(pModal->antCtrlCommon));
REG_WRITE(ah, AR_PHY_SWITCH_COM, le32_to_cpu(pModal->antCtrlCommon));
REG_WRITE(ah, AR_PHY_SWITCH_COM, antCtrlCommon & 0xffff);