MAX_RMU
uint32_t SHAPER_CONTROL[MAX_RMU]; \
uint32_t SHAPER_OFFSET_R[MAX_RMU]; \
uint32_t SHAPER_OFFSET_G[MAX_RMU]; \
uint32_t SHAPER_OFFSET_B[MAX_RMU]; \
uint32_t SHAPER_SCALE_R[MAX_RMU]; \
uint32_t SHAPER_SCALE_G_B[MAX_RMU]; \
uint32_t SHAPER_LUT_INDEX[MAX_RMU]; \
uint32_t SHAPER_LUT_DATA[MAX_RMU]; \
uint32_t SHAPER_LUT_WRITE_EN_MASK[MAX_RMU]; \
uint32_t SHAPER_RAMA_START_CNTL_B[MAX_RMU]; \
uint32_t SHAPER_RAMA_START_CNTL_G[MAX_RMU]; \
uint32_t SHAPER_RAMA_START_CNTL_R[MAX_RMU]; \
uint32_t SHAPER_RAMA_END_CNTL_B[MAX_RMU]; \
uint32_t SHAPER_RAMA_END_CNTL_G[MAX_RMU]; \
uint32_t SHAPER_RAMA_END_CNTL_R[MAX_RMU]; \
uint32_t SHAPER_RAMA_REGION_0_1[MAX_RMU]; \
uint32_t SHAPER_RAMA_REGION_2_3[MAX_RMU]; \
uint32_t SHAPER_RAMA_REGION_4_5[MAX_RMU]; \
uint32_t SHAPER_RAMA_REGION_6_7[MAX_RMU]; \
uint32_t SHAPER_RAMA_REGION_8_9[MAX_RMU]; \
uint32_t SHAPER_RAMA_REGION_10_11[MAX_RMU]; \
uint32_t SHAPER_RAMA_REGION_12_13[MAX_RMU]; \
uint32_t SHAPER_RAMA_REGION_14_15[MAX_RMU]; \
uint32_t SHAPER_RAMA_REGION_16_17[MAX_RMU]; \
uint32_t SHAPER_RAMA_REGION_18_19[MAX_RMU]; \
uint32_t SHAPER_RAMA_REGION_20_21[MAX_RMU]; \
uint32_t SHAPER_RAMA_REGION_22_23[MAX_RMU]; \
uint32_t SHAPER_RAMA_REGION_24_25[MAX_RMU]; \
uint32_t SHAPER_RAMA_REGION_26_27[MAX_RMU]; \
uint32_t SHAPER_RAMA_REGION_28_29[MAX_RMU]; \
uint32_t SHAPER_RAMA_REGION_30_31[MAX_RMU]; \
uint32_t SHAPER_RAMA_REGION_32_33[MAX_RMU]; \
uint32_t SHAPER_RAMB_START_CNTL_B[MAX_RMU]; \
uint32_t SHAPER_RAMB_START_CNTL_G[MAX_RMU]; \
uint32_t SHAPER_RAMB_START_CNTL_R[MAX_RMU]; \
uint32_t SHAPER_RAMB_END_CNTL_B[MAX_RMU]; \
uint32_t SHAPER_RAMB_END_CNTL_G[MAX_RMU]; \
uint32_t SHAPER_RAMB_END_CNTL_R[MAX_RMU]; \
uint32_t SHAPER_RAMB_REGION_0_1[MAX_RMU]; \
uint32_t SHAPER_RAMB_REGION_2_3[MAX_RMU]; \
uint32_t SHAPER_RAMB_REGION_4_5[MAX_RMU]; \
uint32_t SHAPER_RAMB_REGION_6_7[MAX_RMU]; \
uint32_t SHAPER_RAMB_REGION_8_9[MAX_RMU]; \
uint32_t SHAPER_RAMB_REGION_10_11[MAX_RMU]; \
uint32_t SHAPER_RAMB_REGION_12_13[MAX_RMU]; \
uint32_t SHAPER_RAMB_REGION_14_15[MAX_RMU]; \
uint32_t SHAPER_RAMB_REGION_16_17[MAX_RMU]; \
uint32_t SHAPER_RAMB_REGION_18_19[MAX_RMU]; \
uint32_t SHAPER_RAMB_REGION_20_21[MAX_RMU]; \
uint32_t SHAPER_RAMB_REGION_22_23[MAX_RMU]; \
uint32_t SHAPER_RAMB_REGION_24_25[MAX_RMU]; \
uint32_t SHAPER_RAMB_REGION_26_27[MAX_RMU]; \
uint32_t SHAPER_RAMB_REGION_28_29[MAX_RMU]; \
uint32_t SHAPER_RAMB_REGION_30_31[MAX_RMU]; \
uint32_t SHAPER_RAMB_REGION_32_33[MAX_RMU]; \
uint32_t RMU_3DLUT_MODE[MAX_RMU]; \
uint32_t RMU_3DLUT_INDEX[MAX_RMU]; \
uint32_t RMU_3DLUT_DATA[MAX_RMU]; \
uint32_t RMU_3DLUT_DATA_30BIT[MAX_RMU]; \
uint32_t RMU_3DLUT_READ_WRITE_CONTROL[MAX_RMU]; \
uint32_t RMU_3DLUT_OUT_NORM_FACTOR[MAX_RMU]; \
uint32_t RMU_3DLUT_OUT_OFFSET_R[MAX_RMU]; \
uint32_t RMU_3DLUT_OUT_OFFSET_G[MAX_RMU]; \
uint32_t RMU_3DLUT_OUT_OFFSET_B[MAX_RMU]; \