drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1160

struct dpu_hw_blk *hw_pp[MAX_CHANNELS_PER_ENC];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1161

struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1162

struct dpu_hw_blk *hw_dsc[MAX_CHANNELS_PER_ENC];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1163

struct dpu_hw_blk *hw_cwb[MAX_CHANNELS_PER_ENC];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1219

for (i = 0; i < MAX_CHANNELS_PER_ENC; i++)

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

1305

for (i = 0; i < MAX_CHANNELS_PER_ENC; i++) {

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

185

struct dpu_hw_pingpong *hw_pp[MAX_CHANNELS_PER_ENC];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

187

struct dpu_hw_dsc *hw_dsc[MAX_CHANNELS_PER_ENC];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2022

struct dpu_hw_dsc *hw_dsc[MAX_CHANNELS_PER_ENC];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2023

struct dpu_hw_pingpong *hw_pp[MAX_CHANNELS_PER_ENC];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2032

for (i = 0; i < MAX_CHANNELS_PER_ENC; i++) {

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2241

struct dpu_hw_dsc *hw_dsc[MAX_CHANNELS_PER_ENC];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2242

struct dpu_hw_pingpong *hw_pp[MAX_CHANNELS_PER_ENC];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2245

for (i = 0; i < MAX_CHANNELS_PER_ENC; i++) {

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2358

struct dpu_hw_blk *rt_pp_list[MAX_CHANNELS_PER_ENC];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

2379

if (num_pp == 0 || num_pp > MAX_CHANNELS_PER_ENC) {

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

631

for (i = 0; i < MAX_CHANNELS_PER_ENC; i++)