MAX_CHANNELS
struct i5000_dimm_info dimm_info[MAX_CSROWS][MAX_CHANNELS];
pvt->maxch = MAX_CHANNELS;
struct i5400_dimm_info dimm_info[DIMMS_PER_CHANNEL][MAX_CHANNELS];
u16 ambpresent[MAX_CHANNELS]; /* AMB present regs */
struct i7300_dimm_info dimm_info[MAX_SLOTS][MAX_CHANNELS];
for (channel = 0; channel < MAX_CHANNELS; channel++) {
for (channel = 0; channel < MAX_CHANNELS; channel++) {
MAX_CHANNELS, sad->channels);
MAX_CHANNELS);
value = MAX_CHANNELS(sad->channels) |
value = MAX_CHANNELS(sad->channels) |
value = MAX_CHANNELS(sad->channels) |
static const u8 lm90_temp_index[MAX_CHANNELS] = {
static const u8 lm90_temp_min_index[MAX_CHANNELS] = {
static const u8 lm90_temp_max_index[MAX_CHANNELS] = {
static const u8 lm90_temp_crit_index[MAX_CHANNELS] = {
static const u8 lm90_temp_emerg_index[MAX_CHANNELS] = {
static const s8 lm90_temp_offset_index[MAX_CHANNELS] = {
static const u16 lm90_min_alarm_bits[MAX_CHANNELS] = { BIT(5), BIT(3), BIT(11) };
static const u16 lm90_max_alarm_bits[MAX_CHANNELS] = { BIT(6), BIT(4), BIT(12) };
static const u16 lm90_crit_alarm_bits[MAX_CHANNELS] = { BIT(0), BIT(1), BIT(9) };
static const u16 lm90_crit_alarm_bits_swapped[MAX_CHANNELS] = { BIT(1), BIT(0), BIT(9) };
static const u16 lm90_emergency_alarm_bits[MAX_CHANNELS] = { BIT(15), BIT(13), BIT(14) };
static const u16 lm90_fault_bits[MAX_CHANNELS] = { BIT(0), BIT(2), BIT(10) };
if (id >= MAX_CHANNELS) {
u32 channel_config[MAX_CHANNELS + 1];
const char *channel_label[MAX_CHANNELS];
for (i = 0; i < MAX_CHANNELS; i++)
struct isl68137_channel channel[MAX_CHANNELS];
u32 temp_config[MAX_CHANNELS + 1];
struct tmp421_channel channel[MAX_CHANNELS];
static const u8 TMP421_TEMP_MSB[MAX_CHANNELS] = { 0x00, 0x01, 0x02, 0x03 };
static const u8 TMP421_TEMP_LSB[MAX_CHANNELS] = { 0x10, 0x11, 0x12, 0x13 };
struct tmp464_channel channel[MAX_CHANNELS];
static const u8 TMP464_THERM_LIMIT[MAX_CHANNELS] = {
static const u8 TMP464_THERM2_LIMIT[MAX_CHANNELS] = {
for (i = 0; i < MAX_CHANNELS; i++) {
struct hid_sensor_hub_attribute_info prox_attr[MAX_CHANNELS];
struct iio_chan_spec channels[MAX_CHANNELS];
u32 channel2usage[MAX_CHANNELS];
u32 human_presence[MAX_CHANNELS];
int scale_pre_decml[MAX_CHANNELS];
int scale_post_decml[MAX_CHANNELS];
int scale_precision[MAX_CHANNELS];
for (i = 0; i < MAX_CHANNELS; i++) {
if (refcount_read(&dev->num_channels) != MAX_CHANNELS)
if (cc >= MAX_CHANNELS) {
if (le32_to_cpu(pdword[1]) >= MAX_CHANNELS)
if (cc >= MAX_CHANNELS)
if (dev->cc >= MAX_CHANNELS) {
for (j = 0; j < MAX_CHANNELS; j++) {
for (i = 0; i < MAX_CHANNELS; i++) {
for (i = 0; i < MAX_CHANNELS; i++)
for (i = 0; i < MAX_CHANNELS; i++) {
for (i = 0; i < MAX_CHANNELS; i++) {
struct s2255_vc vc[MAX_CHANNELS];
static unsigned long G_chnmap[MAX_CHANNELS] = {3, 2, 1, 0};
(iface->num_channels > MAX_CHANNELS)) {
struct most_channel *channel[MAX_CHANNELS];
for (ch = 0; ch < MAX_CHANNELS; ch++) {
for (i = 0; i < MAX_CHANNELS; i++) {
u32 allocation_map[MAX_CHANNELS][8]; /* Max STB is 256, So 256/32 */
for (i = NVIRT_CHAN; i < MAX_CHANNELS+NVIRT_CHAN; i++)
u16 phys_drv_format[MAX_CHANNELS];
#define MAX_PHYSICAL_DRIVES MAX_CHANNELS*MAX_TARGET
u8 logdrv_chan[MAX_CHANNELS+NVIRT_CHAN]; /* logical drive are on
if (fifo->tail > MAX_CHANNELS)
if (fifo->head > MAX_CHANNELS)
} entry[MAX_CHANNELS + 1];
struct cvmx_usb_pipe *pipe_for_channel[MAX_CHANNELS];
clk_div = DIV_ROUND_CLOSEST(ctx->aclk, MAX_CHANNELS * AES_SAMPLE_WIDTH *
for (i = 0; i < MAX_CHANNELS; i++)
for (i = 0; i < MAX_CHANNELS; i++) {
for (c = 0; c < MAX_CHANNELS; c++) {
for (c = 0; c < MAX_CHANNELS; c++) {
if (channel >= MAX_CHANNELS) {
for (c = 0; c < MAX_CHANNELS; c++) {
int cache_val[MAX_CHANNELS];
unsigned char buf[2 * MAX_CHANNELS] = {0, };