AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV
regval &= (~AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);
regval |= SM((antdiv_ctrl1 >> 3), AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);
regVal &= (~AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);
AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);