AR_PHY_AGC_CONTROL_CAL
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_CAL);
AR_PHY_AGC_CONTROL_CAL, 0, AH_WAIT_TIMEOUT)) {
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_CAL);
if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_CAL,
AR_PHY_AGC_CONTROL_CAL);
AR_PHY_AGC_CONTROL_CAL,
AR_PHY_AGC_CONTROL_CAL);
AR_PHY_AGC_CONTROL_CAL,
AR_PHY_AGC_CONTROL_CAL);
AR_PHY_AGC_CONTROL_CAL,
REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) | AR_PHY_AGC_CONTROL_CAL);
AR_PHY_AGC_CONTROL_CAL,
REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) | AR_PHY_AGC_CONTROL_CAL);
AR_PHY_AGC_CONTROL_CAL,