AR_PHY_AGC_CONTROL
nfcal = !!(REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) & AR_PHY_AGC_CONTROL_NF);
REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah),
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_CAL);
if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL(ah),
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_FLTR_CAL);
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_CAL);
if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_CAL,
REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_FLTR_CAL);
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah),
REG_WRITE(ah, AR_PHY_AGC_CONTROL(ah),
REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) |
if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL(ah),
REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah),
txclcal_done = !!(REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) &
agc_ctrl = REG_READ(ah, AR_PHY_AGC_CONTROL(ah));
REG_WRITE(ah, AR_PHY_AGC_CONTROL(ah), agc_ctrl);
REG_WRITE(ah, AR_PHY_AGC_CONTROL(ah),
REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) |
status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL(ah),
REG_WRITE(ah, AR_PHY_AGC_CONTROL(ah), agc_ctrl);
REG_WRITE(ah, AR_PHY_AGC_CONTROL(ah),
REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) |
status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL(ah),
REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah),
REG_WRITE(ah, AR_PHY_AGC_CONTROL(ah),
REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) | AR_PHY_AGC_CONTROL_CAL);
status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL(ah),
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah),
REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah),
REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah),
REG_WRITE(ah, AR_PHY_AGC_CONTROL(ah),
REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) | AR_PHY_AGC_CONTROL_CAL);
status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL(ah),
REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah),
REG_RMW_FIELD(ah, AR_PHY_AGC_CONTROL(ah),
REG_RMW_FIELD(ah, AR_PHY_AGC_CONTROL(ah),
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah),
REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah),
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah),
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_NF);
u32 bb_agc_ctl = REG_READ(ah, AR_PHY_AGC_CONTROL(ah));
REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_NF);
REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah),
REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah),
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_NF);
if ((REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) &
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah),
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah),
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_NF);
REG_READ(ah, AR_PHY_AGC_CONTROL(ah)));
if (REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) & AR_PHY_AGC_CONTROL_NF) {
else if (!(REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) & AR_PHY_AGC_CONTROL_NF))