MASKBYTE1
rtl_set_bbreg(hw, DM_REG_ANT_MAPPING1_11N, MASKBYTE1, 2);
rtl_set_bbreg(hw, RTXAGC_A_CCK1_MCS32, MASKBYTE1, tmpval);
rtl_set_bbreg(hw, RTXAGC_A_CCK1_MCS32, MASKBYTE1, tmpval);
rtl_set_bbreg(hw, RTXAGC_A_CCK1_MCS32, MASKBYTE1, tmpval);
rtl_set_bbreg(hw, RTXAGC_A_CCK1_MCS32, MASKBYTE1, tmpval);
rtl_set_bbreg(hw, RTXAGC_A_CCK1_MCS32, MASKBYTE1,
rtl_set_bbreg(hw, RTXAGC_B_CCK11_A_CCK2_11, MASKBYTE1,
rtl_set_bbreg(hw, RTXAGC_A_RATE18_06, MASKBYTE1,
rtl_set_bbreg(hw, RTXAGC_A_RATE54_24, MASKBYTE1,
rtl_set_bbreg(hw, RTXAGC_A_MCS03_MCS00, MASKBYTE1,
rtl_set_bbreg(hw, RTXAGC_A_MCS07_MCS04, MASKBYTE1,
rtl_set_bbreg(hw, RTXAGC_A_MCS11_MCS08, MASKBYTE1,
rtl_set_bbreg(hw, RTXAGC_A_MCS15_MCS12, MASKBYTE1,
rtl_set_bbreg(hw, RTXAGC_B_CCK1_55_MCS32, MASKBYTE1,
rtl_set_bbreg(hw, RTXAGC_B_RATE18_06, MASKBYTE1,
rtl_set_bbreg(hw, RTXAGC_B_RATE54_24, MASKBYTE1,
rtl_set_bbreg(hw, RTXAGC_B_MCS03_MCS00, MASKBYTE1,
rtl_set_bbreg(hw, RTXAGC_B_MCS07_MCS04, MASKBYTE1,
rtl_set_bbreg(hw, RTXAGC_B_MCS11_MCS08, MASKBYTE1,
rtl_set_bbreg(hw, RTXAGC_B_MCS15_MCS12, MASKBYTE1,
MASKBYTE1);
MASKBYTE1,
MASKBYTE1);
MASKBYTE1, (u1bdata & 0xfb));
rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x40);
rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x47);
rtl_set_bbreg(hw, RTXAGC_A_CCK1_MCS32, MASKBYTE1, tmpval);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
rtl_set_bbreg(hw, RTXAGC_A_CCK1_MCS32, MASKBYTE1, tmpval);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
MASKBYTE1, power_index);
[EDCCA_TH_H2L_IDX] = {{.addr = 0x8a4, .mask = MASKBYTE1}, .offset = 0},
rtw_write32s_mask(rtwdev, REG_RFESEL8, MASKBYTE1, 0x57);
rtw_write32s_mask(rtwdev, REG_RFESEL8, MASKBYTE1, 0x75);
rtw_write32s_mask(rtwdev, REG_RFESEL8, MASKBYTE1, 0x57);
rtw_write32s_mask(rtwdev, REG_RFESEL8, MASKBYTE1, 0x75);
rtw_coex_write_indirect_reg(rtwdev, 0x38, MASKBYTE1, 0x77);
sel_idx_v = u16_get_bits(sb_cryp_sel, MASKBYTE1);
u32_encode_bits(i + 1, MASKBYTE1) |
pwdb_s20 = u32_get_bits(tmp, MASKBYTE1);
pwdb_s80 = u32_get_bits(tmp, MASKBYTE1);
pwdb[2] = u32_get_bits(tmp, MASKBYTE1);
pwdb[6] = u32_get_bits(tmp, MASKBYTE1);