AR_INTR_PRIO_ASYNC_ENABLE
REG_WRITE(ah, AR_INTR_PRIO_ASYNC_ENABLE(ah), 0);
REG_WRITE(ah, AR_INTR_PRIO_ASYNC_ENABLE(ah), ah->msi_mask);
REG_READ(ah, AR_INTR_PRIO_ASYNC_ENABLE(ah)),
REG_WRITE(ah, AR_INTR_PRIO_ASYNC_ENABLE(ah), 0);
REG_READ(ah, AR_INTR_PRIO_ASYNC_ENABLE(ah));