MATCH
MATCH(STATE_BASE_ADDRESS);
MATCH(STATE_SIP);
MATCH(GPGPU_CSR_BASE_ADDRESS);
MATCH(STATE_COMPUTE_MODE);
MATCH(STATE_SYSTEM_MEM_FENCE_ADDRESS);
MATCH(STATE_CONTEXT_DATA_BASE_ADDRESS);
MATCH(PIPELINE_SELECT);
MATCH(STATE_WRITE_INLINE);
MATCH(mbatt, MBATT),
MATCH(sd1, SD1),
MATCH(sd2, SD2),
MATCH(sd3, SD3),
MATCH(ldo1, LDO1),
MATCH(ldo2, LDO2),
MATCH(ldo3, LDO3),
MATCH(ldo4, LDO4),
MATCH(ldo5, LDO5),
MATCH(ldo6, LDO6),
MATCH(ldo7, LDO7),
MATCH(ldo8, LDO8),
MATCH(ldo9, LDO9),
MATCH(ldo10, LDO10),
MATCH(ldo11, LDO11),
MATCH(ldo12, LDO12),
MATCH(ldo13, LDO13),
MATCH(ldo14, LDO14),
MATCH(ldo15, LDO15),
MATCH(ldo16, LDO16),
MATCH(ldo17, LDO17),
MATCH(ldo18, LDO18),
MATCH(ldo19, LDO19),
MATCH(ldo20, LDO20),
MATCH(out5v, OUT5V),
MATCH(out33v, OUT33V),
MATCH(bbat, BBAT),
MATCH(sdby, SDBY),
MATCH(vrtc, VRTC),
MATCH(buck1, BUCK1),
MATCH(buck2, BUCK2),
MATCH(buck3, BUCK3),
MATCH(buck4, BUCK4),
MATCH(ldo1, LDO1),
MATCH(ldo2, LDO2),
MATCH(ldo3, LDO3),
MATCH(ldo4, LDO4),
MATCH(ldo5, LDO5),
MATCH(ldo6, LDO6),
MATCH(vref_ddr, VREF_DDR),
MATCH(boost, BOOST),
MATCH(pwr_sw1, VBUS_OTG),
MATCH(pwr_sw2, SW_OUT),
state->mode = MATCH;
case MATCH:
MATCH(proto, x->id.proto) &&
MATCH(mode, x->props.mode) &&
MATCH(spi, x->id.spi) &&
MATCH(reqid, x->props.reqid);