MASK_27
if (0 != (isr & (MASK_27))) {
isr &= ~MASK_27;
if (0 != (isr & (MASK_27))) {
WRITE_RPS0(MASK_27 | MASK_11);
saa7146_write(dev, MC2, MASK_27 );
saa7146_write(dev, MC2, MASK_27 );
SAA7146_IER_ENABLE(dev, MASK_27);
SAA7146_IER_DISABLE(dev, MASK_27);
saa7146_write(saa, MC1, MASK_27 | MASK_11);
saa7146_write(saa, MC1, MASK_27);
saa7146_write(saa, MC1, MASK_27);
saa7146_write(saa, MC1, MASK_27 | MASK_11);
saa7146_write(saa, MC1, MASK_27);
saa7146_write(saa, MC1, MASK_27);
#define CMD_OAN MASK_27