Symbol: ARM_cpsr
arch/arm/include/asm/kexec.h
48
[_ARM_cpsr] "=r" (newregs->ARM_cpsr),
arch/arm/include/asm/perf_event.h
15
(regs)->ARM_cpsr = SVC_MODE; \
arch/arm/include/asm/processor.h
71
regs->ARM_cpsr = USR_MODE; \
arch/arm/include/asm/processor.h
73
regs->ARM_cpsr = USR26_MODE; \
arch/arm/include/asm/processor.h
75
regs->ARM_cpsr |= PSR_T_BIT; \
arch/arm/include/asm/processor.h
77
regs->ARM_cpsr |= PSR_E_BIT; \
arch/arm/include/asm/ptrace.h
29
(((regs)->ARM_cpsr & 0xf) == 0)
arch/arm/include/asm/ptrace.h
33
(((regs)->ARM_cpsr & PSR_T_BIT))
arch/arm/include/asm/ptrace.h
40
(FIELD_GET(PSR_J_BIT, (regs)->ARM_cpsr) << 1 | \
arch/arm/include/asm/ptrace.h
41
FIELD_GET(PSR_T_BIT, (regs)->ARM_cpsr))
arch/arm/include/asm/ptrace.h
47
((regs)->ARM_cpsr & MODE_MASK)
arch/arm/include/asm/ptrace.h
50
(!((regs)->ARM_cpsr & PSR_I_BIT))
arch/arm/include/asm/ptrace.h
53
(!((regs)->ARM_cpsr & PSR_F_BIT))
arch/arm/include/asm/ptrace.h
61
unsigned long mode = regs->ARM_cpsr & MODE_MASK;
arch/arm/include/asm/ptrace.h
66
regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT);
arch/arm/include/asm/ptrace.h
68
if ((regs->ARM_cpsr & PSR_I_BIT) == 0) {
arch/arm/include/asm/ptrace.h
78
regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT;
arch/arm/include/asm/ptrace.h
80
regs->ARM_cpsr |= USR_MODE;
arch/arm/include/asm/xen/events.h
17
return raw_irqs_disabled_flags(regs->ARM_cpsr);
arch/arm/kernel/asm-offsets.c
86
DEFINE(S_PSR, offsetof(struct pt_regs, ARM_cpsr));
arch/arm/kernel/kgdb.c
48
{ "cpsr", 4, offsetof(struct pt_regs, ARM_cpsr)},
arch/arm/kernel/process.c
139
regs->ARM_pc, regs->ARM_lr, regs->ARM_cpsr);
arch/arm/kernel/process.c
152
flags = regs->ARM_cpsr;
arch/arm/kernel/process.c
176
printk("xPSR: %08lx\n", regs->ARM_cpsr);
arch/arm/kernel/process.c
264
childregs->ARM_cpsr = SVC_MODE;
arch/arm/kernel/signal.c
169
regs->ARM_cpsr = context.arm_cpsr;
arch/arm/kernel/signal.c
274
.arm_cpsr = regs->ARM_cpsr,
arch/arm/kernel/signal.c
328
unsigned long cpsr = regs->ARM_cpsr & ~(PSR_f | PSR_E_BIT);
arch/arm/kernel/signal.c
442
regs->ARM_cpsr = cpsr;
arch/arm/kernel/swp_emulate.c
167
res = arm_check_condition(instr, regs->ARM_cpsr);
arch/arm/kernel/traps.c
438
(regs->ARM_cpsr & hook->cpsr_mask) == hook->cpsr_val)
arch/arm/kernel/traps.c
641
regs->ARM_cpsr &= ~MODE32_BIT;
arch/arm/kernel/traps.c
647
regs->ARM_cpsr |= MODE32_BIT;
arch/arm/mm/alignment.c
905
if (regs->ARM_cpsr & PSR_C_BIT)
arch/arm/mm/alignment.c
943
regs->ARM_cpsr = it_advance(regs->ARM_cpsr);
arch/arm/mm/extable.c
17
regs->ARM_cpsr &= ~PSR_IT_MASK;
arch/arm/probes/decode-arm.c
73
regs->ARM_cpsr |= PSR_T_BIT;
arch/arm/probes/decode-arm.c
86
regs->ARM_cpsr &= ~PSR_T_BIT;
arch/arm/probes/decode-arm.c
88
regs->ARM_cpsr |= PSR_T_BIT;
arch/arm/probes/decode-arm.c
96
regs->uregs[rd] = regs->ARM_cpsr & mask;
arch/arm/probes/decode-thumb.c
849
regs->ARM_cpsr = it_advance(regs->ARM_cpsr);
arch/arm/probes/decode-thumb.c
858
regs->ARM_cpsr = it_advance(regs->ARM_cpsr);
arch/arm/probes/decode.h
41
long cpsr = regs->ARM_cpsr;
arch/arm/probes/decode.h
49
regs->ARM_cpsr = cpsr;
arch/arm/probes/kprobes/actions-arm.c
170
unsigned long cpsr = regs->ARM_cpsr;
arch/arm/probes/kprobes/actions-arm.c
186
regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK);
arch/arm/probes/kprobes/actions-arm.c
200
unsigned long cpsr = regs->ARM_cpsr;
arch/arm/probes/kprobes/actions-arm.c
213
regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK);
arch/arm/probes/kprobes/actions-arm.c
230
unsigned long cpsr = regs->ARM_cpsr;
arch/arm/probes/kprobes/actions-arm.c
243
regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK);
arch/arm/probes/kprobes/actions-arm.c
280
unsigned long cpsr = regs->ARM_cpsr;
arch/arm/probes/kprobes/actions-arm.c
294
regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK);
arch/arm/probes/kprobes/actions-thumb.c
221
unsigned long cpsr = regs->ARM_cpsr;
arch/arm/probes/kprobes/actions-thumb.c
234
regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK);
arch/arm/probes/kprobes/actions-thumb.c
388
unsigned long cpsr = regs->ARM_cpsr;
arch/arm/probes/kprobes/actions-thumb.c
392
regs->ARM_cpsr = cpsr;
arch/arm/probes/kprobes/actions-thumb.c
445
unsigned long oldcpsr = regs->ARM_cpsr;
arch/arm/probes/kprobes/actions-thumb.c
470
regs->ARM_cpsr = t16_emulate_loregs(insn, asi, regs);
arch/arm/probes/kprobes/actions-thumb.c
479
regs->ARM_cpsr = cpsr;
arch/arm/probes/kprobes/actions-thumb.c
49
regs->uregs[rd] = regs->ARM_cpsr & mask;
arch/arm/probes/kprobes/actions-thumb.c
492
unsigned long cpsr = regs->ARM_cpsr;
arch/arm/probes/kprobes/actions-thumb.c
510
regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK);
arch/arm/probes/kprobes/actions-thumb.c
97
regs->ARM_cpsr &= ~PSR_T_BIT;
arch/arm/probes/kprobes/core.c
213
regs->ARM_cpsr = it_advance(regs->ARM_cpsr);
arch/arm/probes/kprobes/core.c
259
if (!p->ainsn.insn_check_cc(regs->ARM_cpsr)) {
arch/arm/probes/kprobes/test-core.c
1121
regs->ARM_cpsr &= ~(APSR_MASK | PSR_IT_MASK);
arch/arm/probes/kprobes/test-core.c
1122
regs->ARM_cpsr |= test_context_cpsr(scenario);
arch/arm/probes/kprobes/test-core.c
1146
regs->ARM_cpsr |= PSR_I_BIT;
arch/arm/probes/kprobes/test-core.c
1202
initial_regs.ARM_cpsr &= ~PSR_IGNORE_BITS;
arch/arm/probes/kprobes/test-core.c
1223
result_regs.ARM_cpsr &= ~PSR_IGNORE_BITS;
arch/arm/probes/kprobes/test-core.c
1234
regs->ARM_cpsr &= ~PSR_I_BIT;
arch/arm/probes/kprobes/test-core.c
1275
pr_err("cpsr %08lx\n", regs->ARM_cpsr);
arch/arm/probes/uprobes/core.c
38
if (!auprobe->asi.insn_check_cc(regs->ARM_cpsr)) {
samples/kprobes/kprobe_example.c
48
p->symbol_name, p->addr, (long)regs->ARM_pc, (long)regs->ARM_cpsr);
samples/kprobes/kprobe_example.c
89
p->symbol_name, p->addr, (long)regs->ARM_cpsr);