M10V_PLL7
{M10V_PLL7, NULL, 1, 40, -1},
{M10V_PLL7DIV2, M10V_PLL7, 2, 1, -1},
{M10V_PLL7DIV5, M10V_PLL7, 5, 1, -1},
{M10V_UHS1CLK2_PARENT0, M10V_PLL7, 4, 1, -1},
{M10V_UHS1CLK2_PARENT1, M10V_PLL7, 8, 1, -1},
{M10V_UHS1CLK2_PARENT2, M10V_PLL7, 16, 1, -1},
{M10V_UHS1CLK1_PARENT0, M10V_PLL7, 8, 1, -1},
{M10V_UHS1CLK1_PARENT1, M10V_PLL7, 16, 1, -1},
{"uhs1clk0", M10V_PLL7, CLKSEL(1), 3, 5, uhs1clk0_table, 0, -1},