ARM_CSPMU_FORMAT_ATTR
ARM_CSPMU_FORMAT_ATTR(threshold, "config1:0-7"),
ARM_CSPMU_FORMAT_ATTR(rank, "config1:8-23"),
ARM_CSPMU_FORMAT_ATTR(bank, "config1:24-55"),
ARM_CSPMU_FORMAT_ATTR(event, "config:0-32")
ARM_CSPMU_FORMAT_ATTR(filter, "config1:0-31")
ARM_CSPMU_FORMAT_ATTR(filter2, "config2:0-31")
ARM_CSPMU_FORMAT_ATTR(root_port, "config1:0-9"),
ARM_CSPMU_FORMAT_ATTR(port, "config1:0-1"),
ARM_CSPMU_FORMAT_ATTR(rem_socket, "config1:0-3"),
ARM_CSPMU_FORMAT_ATTR(src_loc_noncpu, "config1:0"),
ARM_CSPMU_FORMAT_ATTR(src_loc_cpu, "config1:1"),
ARM_CSPMU_FORMAT_ATTR(src_rem, "config1:2"),
ARM_CSPMU_FORMAT_ATTR(dst_loc_cmem, "config1:8"),
ARM_CSPMU_FORMAT_ATTR(dst_loc_gmem, "config1:9"),
ARM_CSPMU_FORMAT_ATTR(dst_loc_other, "config1:10"),
ARM_CSPMU_FORMAT_ATTR(dst_rem, "config1:11"),
ARM_CSPMU_FORMAT_ATTR(src_rp_mask, "config1:0-7"),
ARM_CSPMU_FORMAT_ATTR(src_bdf, "config1:8-23"),
ARM_CSPMU_FORMAT_ATTR(src_bdf_en, "config1:24"),
ARM_CSPMU_FORMAT_ATTR(dst_loc_cmem, "config2:0"),
ARM_CSPMU_FORMAT_ATTR(dst_loc_gmem, "config2:1"),
ARM_CSPMU_FORMAT_ATTR(dst_loc_pcie_p2p, "config2:2"),
ARM_CSPMU_FORMAT_ATTR(dst_loc_pcie_cxl, "config2:3"),
ARM_CSPMU_FORMAT_ATTR(dst_rem, "config2:4"),
ARM_CSPMU_FORMAT_ATTR(event, "config:0-2"),
ARM_CSPMU_FORMAT_ATTR(dst_rp_mask, "config:3-10"),
ARM_CSPMU_FORMAT_ATTR(dst_addr_en, "config:11"),
ARM_CSPMU_FORMAT_ATTR(dst_addr_base, "config1:0-63"),
ARM_CSPMU_FORMAT_ATTR(dst_addr_mask, "config2:0-63"),