arch/arm/include/asm/hw_breakpoint.h

81

#define ARM_MAX_HBP_SLOTS (ARM_MAX_BRP + ARM_MAX_WRP)

arch/arm/kernel/hw_breakpoint.c

31

static DEFINE_PER_CPU(struct perf_event *, bp_on_reg[ARM_MAX_BRP]);

arch/arm/kernel/ptrace.c

332

num = (ARM_MAX_BRP << 1) - num;

arch/arm/kernel/ptrace.c

342

long mid = ARM_MAX_BRP << 1;

arch/arm64/include/asm/hw_breakpoint.h

87

#define AARCH64_DBG_REG_BCR (AARCH64_DBG_REG_BVR + ARM_MAX_BRP)

arch/arm64/include/asm/hw_breakpoint.h

88

#define AARCH64_DBG_REG_WVR (AARCH64_DBG_REG_BCR + ARM_MAX_BRP)

arch/arm64/include/asm/processor.h

116

struct perf_event *hbp_break[ARM_MAX_BRP];

arch/arm64/kernel/hw_breakpoint.c

32

static DEFINE_PER_CPU(struct perf_event *, bp_on_reg[ARM_MAX_BRP]);

arch/arm64/kernel/ptrace.c

182

for (i = 0; i < ARM_MAX_BRP; ++i) {

arch/arm64/kernel/ptrace.c

212

for (i = 0; i < ARM_MAX_BRP; i++) {

arch/arm64/kernel/ptrace.c

240

if (idx >= ARM_MAX_BRP)

arch/arm64/kernel/ptrace.c

242

idx = array_index_nospec(idx, ARM_MAX_BRP);

arch/arm64/kernel/ptrace.c

266

if (idx >= ARM_MAX_BRP)

arch/arm64/kernel/ptrace.c

268

idx = array_index_nospec(idx, ARM_MAX_BRP);