ARM_IP
emit(ARM_SUB_I(ARM_IP, rt, 32), ctx);
emit(ARM_ORR_SR(ARM_LR, ARM_LR, rd[1], SRTYPE_ASL, ARM_IP), ctx);
emit(ARM_ORR_SR(ARM_IP, ARM_LR, rd[1], SRTYPE_LSR, tmp2[0]), ctx);
arm_bpf_put_reg32(dst_hi, ARM_IP, ctx);
emit(ARM_RSB_I(ARM_IP, rt, 32), ctx);
emit(ARM_ORR_SR(ARM_LR, ARM_LR, rd[0], SRTYPE_ASL, ARM_IP), ctx);
emit(ARM_MOV_SR(ARM_IP, rd[0], SRTYPE_ASR, rt), ctx);
arm_bpf_put_reg32(dst_hi, ARM_IP, ctx);
emit(ARM_RSB_I(ARM_IP, rt, 32), ctx);
emit(ARM_ORR_SR(ARM_LR, ARM_LR, rd[0], SRTYPE_ASL, ARM_IP), ctx);
emit(ARM_MOV_SR(ARM_IP, rd[0], SRTYPE_LSR, rt), ctx);
arm_bpf_put_reg32(dst_hi, ARM_IP, ctx);
emit(ARM_MUL(ARM_IP, rd[1], rt[0]), ctx);
emit(ARM_ADD_R(ARM_LR, ARM_IP, ARM_LR), ctx);
emit(ARM_UMULL(ARM_IP, rd[0], rd[1], rt[1]), ctx);
arm_bpf_put_reg32(dst_lo, ARM_IP, ctx);
emit(ARM_AND_R(ARM_IP, rt, rn), ctx);
emit(ARM_ORRS_R(ARM_IP, ARM_LR, ARM_IP), ctx);
emit(ARM_ANDS_R(ARM_IP, rt, rn), ctx);
emit(ARM_SBCS_R(ARM_IP, rm, rd), ctx);
emit(ARM_SBCS_R(ARM_IP, rd, rm), ctx);
emit(ARM_ORR_SI(ARM_IP, tmp2[0], tmp2[1], SRTYPE_LSL, 24), ctx);
emit(ARM_ORR_R(rd, ARM_IP, tmp2[0]), ctx);
u16 reg_set = CALLEE_PUSH_MASK | 1 << ARM_IP | 1 << ARM_PC;
emit(ARM_MOV_R(ARM_IP, ARM_SP), ctx);
emit(ARM_SUB_I(ARM_FP, ARM_IP, 4), ctx);
emit(sign ? ARM_SDIV(ARM_IP, rm, rn) : ARM_UDIV(ARM_IP, rm, rn), ctx);
emit(ARM_MLS(rd, rn, ARM_IP, rm), ctx);
emit_mov_i(ARM_IP, dst, ctx);
emit_blx_r(ARM_IP, ctx);
emit_mov_i(ARM_IP, dst, ctx);
emit_blx_r(ARM_IP, ctx);