arch/arm/mach-omap1/clock.c

169

int dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset));

arch/arm/mach-omap1/clock.c

312

regval = omap_readw(ARM_CKCTL);

arch/arm/mach-omap1/clock.c

316

omap_writew(regval, ARM_CKCTL);

arch/arm/mach-omap1/clock.c

541

if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL))

arch/arm/mach-omap1/clock.c

562

if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL))

arch/arm/mach-omap1/clock.c

586

if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL))

arch/arm/mach-omap1/clock.c

607

if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL))

arch/arm/mach-omap1/clock_data.c

200

.enable_reg = OMAP1_IO_ADDRESS(ARM_CKCTL),

arch/arm/mach-omap1/clock_data.c

733

omap_readw(ARM_CKCTL));

arch/arm/mach-omap1/clock_data.c

776

omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL);

arch/arm/mach-omap1/pm.c

251

ARM_SAVE(ARM_CKCTL);

arch/arm/mach-omap1/pm.c

273

omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL);

arch/arm/mach-omap1/pm.c

341

ARM_RESTORE(ARM_CKCTL);

arch/arm/mach-omap1/pm.c

393

ARM_SAVE(ARM_CKCTL);

arch/arm/mach-omap1/pm.c

441

ARM_SHOW(ARM_CKCTL),