ARMCLK
rockchip_clk_register_armclk(ctx, ARMCLK, "armclk",
rockchip_clk_register_armclk(ctx, ARMCLK, "armclk",
rockchip_clk_register_armclk(ctx, ARMCLK, "armclk",
rockchip_clk_register_armclk(ctx, ARMCLK, "armclk",
rockchip_clk_register_armclk(ctx, ARMCLK, "armclk",
rockchip_clk_register_armclk(ctx, ARMCLK, "armclk",
rockchip_clk_register_armclk(ctx, ARMCLK, "armclk",
rockchip_clk_register_armclk(ctx, ARMCLK, "armclk",
rockchip_clk_register_armclk(ctx, ARMCLK, "armclk",
MUX(ARMCLK, "armclk", mux_armclk_p, CLK_IS_CRITICAL | CLK_SET_RATE_PARENT,
rockchip_clk_register_armclk(ctx, ARMCLK, "armclk",
rockchip_clk_register_armclk(ctx, ARMCLK, "armclk",
rockchip_clk_register_armclk(ctx, ARMCLK, "armclk",
rockchip_clk_register_armclk(ctx, ARMCLK, "armclk",
MUX(ARMCLK, "armclk", mux_armclk_p, CLK_IS_CRITICAL | CLK_SET_RATE_PARENT,
DIV(ARMCLK, "armclk", "mout_apll", CLK_DIV0, 0, 3),
DIV(ARMCLK, "armclk", "mout_apll", CLK_DIV0, 0, 4),
ALIAS(ARMCLK, NULL, "armclk"),
clk_hw_get_rate(hws[ARMCLK]));