Symbol: LCPLL_CTL
drivers/gpu/drm/i915/display/intel_cdclk.c
554
u32 lcpll = intel_de_read(display, LCPLL_CTL);
drivers/gpu/drm/i915/display/intel_cdclk.c
834
u32 lcpll = intel_de_read(display, LCPLL_CTL);
drivers/gpu/drm/i915/display/intel_cdclk.c
883
(intel_de_read(display, LCPLL_CTL) &
drivers/gpu/drm/i915/display/intel_cdclk.c
898
intel_de_rmw(display, LCPLL_CTL,
drivers/gpu/drm/i915/display/intel_cdclk.c
905
ret = intel_de_wait_for_set_us(display, LCPLL_CTL,
drivers/gpu/drm/i915/display/intel_cdclk.c
910
intel_de_rmw(display, LCPLL_CTL,
drivers/gpu/drm/i915/display/intel_cdclk.c
913
intel_de_rmw(display, LCPLL_CTL,
drivers/gpu/drm/i915/display/intel_cdclk.c
916
ret = intel_de_wait_for_clear_us(display, LCPLL_CTL,
drivers/gpu/drm/i915/display/intel_display_power.c
1184
u32 val = intel_de_read(display, LCPLL_CTL);
drivers/gpu/drm/i915/display/intel_display_power.c
1287
val = intel_de_read(display, LCPLL_CTL);
drivers/gpu/drm/i915/display/intel_display_power.c
1291
intel_de_write(display, LCPLL_CTL, val);
drivers/gpu/drm/i915/display/intel_display_power.c
1293
ret = intel_de_wait_for_set_us(display, LCPLL_CTL,
drivers/gpu/drm/i915/display/intel_display_power.c
1298
val = intel_de_read(display, LCPLL_CTL);
drivers/gpu/drm/i915/display/intel_display_power.c
1302
intel_de_write(display, LCPLL_CTL, val);
drivers/gpu/drm/i915/display/intel_display_power.c
1303
intel_de_posting_read(display, LCPLL_CTL);
drivers/gpu/drm/i915/display/intel_display_power.c
1305
if (intel_de_wait_for_clear_ms(display, LCPLL_CTL, LCPLL_PLL_LOCK, 1))
drivers/gpu/drm/i915/display/intel_display_power.c
1320
intel_de_rmw(display, LCPLL_CTL, 0, LCPLL_POWER_DOWN_ALLOW);
drivers/gpu/drm/i915/display/intel_display_power.c
1321
intel_de_posting_read(display, LCPLL_CTL);
drivers/gpu/drm/i915/display/intel_display_power.c
1334
val = intel_de_read(display, LCPLL_CTL);
drivers/gpu/drm/i915/display/intel_display_power.c
1348
intel_de_write(display, LCPLL_CTL, val);
drivers/gpu/drm/i915/display/intel_display_power.c
1349
intel_de_posting_read(display, LCPLL_CTL);
drivers/gpu/drm/i915/display/intel_display_power.c
1357
val = intel_de_read(display, LCPLL_CTL);
drivers/gpu/drm/i915/display/intel_display_power.c
1359
intel_de_write(display, LCPLL_CTL, val);
drivers/gpu/drm/i915/display/intel_display_power.c
1361
if (intel_de_wait_for_set_ms(display, LCPLL_CTL, LCPLL_PLL_LOCK, 5))
drivers/gpu/drm/i915/display/intel_display_power.c
1365
intel_de_rmw(display, LCPLL_CTL, LCPLL_CD_SOURCE_FCLK, 0);
drivers/gpu/drm/i915/display/intel_display_power.c
1367
ret = intel_de_wait_for_clear_us(display, LCPLL_CTL,
drivers/gpu/drm/i915/gvt/handlers.c
2366
MMIO_DH(LCPLL_CTL, D_ALL, NULL, lcpll_ctl_mmio_write);
drivers/gpu/drm/i915/intel_gvt_mmio_table.c
424
MMIO_D(LCPLL_CTL);