Symbol: LANE_COUNT_FOUR
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
8012
link->verified_link_cap.lane_count = LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
297
case LANE_COUNT_FOUR:
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
3539
case LANE_COUNT_FOUR:
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
434
case LANE_COUNT_FOUR:
drivers/gpu/drm/amd/display/dc/bios/command_table.c
236
if (LANE_COUNT_FOUR < cntl->lanes_number)
drivers/gpu/drm/amd/display/dc/bios/command_table.c
282
if (LANE_COUNT_FOUR < cntl->lanes_number)
drivers/gpu/drm/amd/display/dc/bios/command_table.c
481
if (LANE_COUNT_FOUR < cntl->lanes_number) {
drivers/gpu/drm/amd/display/dc/bios/command_table.c
619
if (LANE_COUNT_FOUR < cntl->lanes_number) {
drivers/gpu/drm/amd/display/dc/bios/command_table.c
753
if (LANE_COUNT_FOUR < cntl->lanes_number)
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
38
LANE_COUNT_DP_MAX = LANE_COUNT_FOUR
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
1036
cntl.lanes_number = LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
1781
struct dc_link_settings max_link_cap = {LANE_COUNT_FOUR, LINK_RATE_HIGH,
drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
546
cntl.lanes_number = LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
663
cntl.lanes_number = (is_dual_link) ? LANE_COUNT_EIGHT : LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
687
cntl.lanes_number = LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
1463
struct dc_link_settings max_link_cap = {LANE_COUNT_FOUR, LINK_RATE_HIGH,
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
843
cntl.lanes_number = LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
494
cntl.lanes_number = LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
614
cntl.lanes_number = (is_dual_link) ? LANE_COUNT_EIGHT : LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c
544
cntl.lanes_number = (is_dual_link) ? LANE_COUNT_EIGHT : LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c
590
cntl.lanes_number = LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c
121
cntl.lanes_number = (is_dual_link) ? LANE_COUNT_EIGHT : LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c
161
cntl.lanes_number = LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c
119
cntl.lanes_number = LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c
79
cntl.lanes_number = (is_dual_link) ? LANE_COUNT_EIGHT : LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c
106
cntl.lanes_number = LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c
67
cntl.lanes_number = (is_dual_link) ? LANE_COUNT_EIGHT : LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c
119
cntl.lanes_number = LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c
79
cntl.lanes_number = (is_dual_link) ? LANE_COUNT_EIGHT : LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/dio/virtual/virtual_link_encoder.c
90
struct dc_link_settings max_link_cap = {LANE_COUNT_FOUR, LINK_RATE_HIGH,
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
851
cntl.lanes_number = LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
973
cntl.lanes_number = LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio_fixed_vs_pe_retimer.c
168
if (link_settings->lane_count == LANE_COUNT_FOUR)
drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio_fixed_vs_pe_retimer.c
32
if (link->cur_link_settings.lane_count == LANE_COUNT_FOUR)
drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.c
107
if (link->cur_link_settings.lane_count == LANE_COUNT_FOUR)
drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.c
114
if (link->cur_link_settings.lane_count == LANE_COUNT_FOUR)
drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.c
201
if (link_settings->lane_count == LANE_COUNT_FOUR)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
506
case LANE_COUNT_FOUR:
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
558
return LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
78
{LANE_COUNT_FOUR, LINK_RATE_UHBR20},
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
79
{LANE_COUNT_FOUR, LINK_RATE_UHBR13_5},
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
81
{LANE_COUNT_FOUR, LINK_RATE_UHBR10},
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
83
{LANE_COUNT_FOUR, LINK_RATE_HIGH3},
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
86
{LANE_COUNT_FOUR, LINK_RATE_HIGH2},
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
91
{LANE_COUNT_FOUR, LINK_RATE_HIGH},
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
93
{LANE_COUNT_FOUR, LINK_RATE_LOW},
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
990
link_setting->lane_count = LANE_COUNT_FOUR;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
450
else if (ln_count >= LANE_COUNT_FOUR && !dpcd_lane_status[2].bits.CR_DONE_0)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
452
else if (ln_count >= LANE_COUNT_FOUR && !dpcd_lane_status[3].bits.CR_DONE_0)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
305
if (lt_settings->link_settings.lane_count == LANE_COUNT_FOUR) {