arch/arm/mm/cache-l2x0.c

194

writel_relaxed(start, base + L2X0_CLEAN_INV_LINE_PA);

arch/arm/mm/cache-l2x0.c

200

writel_relaxed(end, base + L2X0_CLEAN_INV_LINE_PA);

arch/arm/mm/cache-l2x0.c

221

__l2c210_op_pa_range(base + L2X0_CLEAN_INV_LINE_PA, start, end);

arch/arm/mm/cache-l2x0.c

317

writel_relaxed(start, base + L2X0_CLEAN_INV_LINE_PA);

arch/arm/mm/cache-l2x0.c

323

l2c_wait_mask(base + L2X0_CLEAN_INV_LINE_PA, 1);

arch/arm/mm/cache-l2x0.c

324

writel_relaxed(end, base + L2X0_CLEAN_INV_LINE_PA);

arch/arm/mm/cache-l2x0.c

349

l2c_wait_mask(base + L2X0_CLEAN_INV_LINE_PA, 1);

arch/arm/mm/cache-l2x0.c

366

flags = l2c220_op_pa_range(base + L2X0_CLEAN_INV_LINE_PA,

arch/arm/mm/cache-l2x0.c

368

l2c_wait_mask(base + L2X0_CLEAN_INV_LINE_PA, 1);