L1_CACHE_SHIFT
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
if ((a >> L1_CACHE_SHIFT) != ((a + len - 1) >> L1_CACHE_SHIFT))
#if L1_CACHE_SHIFT == 6
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define L1_CACHE_BYTES (1<< L1_CACHE_SHIFT)
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
return L1_CACHE_SHIFT;
return L1_CACHE_SHIFT;
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define BNX2X_RX_ALIGN_SHIFT max(6, min(8, L1_CACHE_SHIFT))
data->rx.cache_line_alignment_log_size = L1_CACHE_SHIFT;
#define QEDE_RX_ALIGN_SHIFT max(6, min(8, L1_CACHE_SHIFT))
return (u32)(((unsigned long)vlan) >> L1_CACHE_SHIFT);
entries_per_cacheline = L1_CACHE_SHIFT - 3;
tmp = (((unsigned long)sb>>L1_CACHE_SHIFT) ^ id) * (MAXQUOTAS - type);
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define INTERNODE_CACHE_SHIFT L1_CACHE_SHIFT
#define CACHELINE_PER_PAGE_SHIFT (PAGE_SHIFT - L1_CACHE_SHIFT)
(offset_in_page(entry->paddr) >> L1_CACHE_SHIFT);
addr >>= L1_CACHE_SHIFT;
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)