arch/riscv/include/uapi/asm/kvm.h

252

#define KVM_REG_RISCV_CONFIG (0x01 << KVM_REG_RISCV_TYPE_SHIFT)

arch/riscv/include/uapi/asm/kvm.h

257

#define KVM_REG_RISCV_CORE (0x02 << KVM_REG_RISCV_TYPE_SHIFT)

arch/riscv/include/uapi/asm/kvm.h

262

#define KVM_REG_RISCV_CSR (0x03 << KVM_REG_RISCV_TYPE_SHIFT)

arch/riscv/include/uapi/asm/kvm.h

274

#define KVM_REG_RISCV_TIMER (0x04 << KVM_REG_RISCV_TYPE_SHIFT)

arch/riscv/include/uapi/asm/kvm.h

279

#define KVM_REG_RISCV_FP_F (0x05 << KVM_REG_RISCV_TYPE_SHIFT)

arch/riscv/include/uapi/asm/kvm.h

284

#define KVM_REG_RISCV_FP_D (0x06 << KVM_REG_RISCV_TYPE_SHIFT)

arch/riscv/include/uapi/asm/kvm.h

289

#define KVM_REG_RISCV_ISA_EXT (0x07 << KVM_REG_RISCV_TYPE_SHIFT)

arch/riscv/include/uapi/asm/kvm.h

301

#define KVM_REG_RISCV_SBI_EXT (0x08 << KVM_REG_RISCV_TYPE_SHIFT)

arch/riscv/include/uapi/asm/kvm.h

313

#define KVM_REG_RISCV_VECTOR (0x09 << KVM_REG_RISCV_TYPE_SHIFT)

arch/riscv/include/uapi/asm/kvm.h

320

#define KVM_REG_RISCV_SBI_STATE (0x0a << KVM_REG_RISCV_TYPE_SHIFT)