JME_MISC
mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
JME_TMCSR = JME_MISC | 0x00, /* Timer Control/Status Register */
JME_GPREG0 = JME_MISC | 0x08, /* General purpose REG-0 */
JME_GPREG1 = JME_MISC | 0x0C, /* General purpose REG-1 */
JME_IEVE = JME_MISC | 0x20, /* Interrupt Event Status */
JME_IREQ = JME_MISC | 0x24, /* Intr Req Status(For Debug) */
JME_IENS = JME_MISC | 0x28, /* Intr Enable - Setting Port */
JME_IENC = JME_MISC | 0x2C, /* Interrupt Enable - Clear Port */
JME_PCCRX0 = JME_MISC | 0x30, /* PCC Control for RX Queue 0 */
JME_PCCTX = JME_MISC | 0x40, /* PCC Control for TX Queues */
JME_CHIPMODE = JME_MISC | 0x44, /* Identify FPGA Version */
JME_SHBA_HI = JME_MISC | 0x48, /* Shadow Register Base HI */
JME_SHBA_LO = JME_MISC | 0x4C, /* Shadow Register Base LO */
JME_TIMER1 = JME_MISC | 0x70, /* Timer1 */
JME_TIMER2 = JME_MISC | 0x74, /* Timer2 */
JME_APMC = JME_MISC | 0x7C, /* Aggressive Power Mode Control */
JME_PCCSRX0 = JME_MISC | 0x80, /* PCC Status of RX0 */