JZ_REG_AIC_CONF
regmap_set_bits(i2s->regmap, JZ_REG_AIC_CONF, JZ_AIC_CONF_ENABLE);
regmap_clear_bits(i2s->regmap, JZ_REG_AIC_CONF, JZ_AIC_CONF_ENABLE);
regmap_update_bits(i2s->regmap, JZ_REG_AIC_CONF, conf_mask, conf);
regmap_read(i2s->regmap, JZ_REG_AIC_CONF, &conf);
.field_rx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 12, 15),
.field_tx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 8, 11),
.field_rx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 24, 27),
.field_tx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 16, 20),
.field_rx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 24, 27),
.field_tx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 16, 20),
.field_rx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 24, 27),
.field_tx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 16, 20),
.field_rx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 24, 27),
.field_tx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 16, 20),
regmap_clear_bits(i2s->regmap, JZ_REG_AIC_CONF, JZ_AIC_CONF_ENABLE);
regmap_set_bits(i2s->regmap, JZ_REG_AIC_CONF, JZ_AIC_CONF_ENABLE);
regmap_write(i2s->regmap, JZ_REG_AIC_CONF, JZ_AIC_CONF_RESET);
regmap_write(i2s->regmap, JZ_REG_AIC_CONF,