JPU
INTC_VECT(JPU, 0x560), INTC_VECT(LCDC, 0x580),
{ 0, TMU2, TMU1, TMU0, JPU, 0, 0, LCDC } },
{ 0xa4080004, 0, 16, 4, /* IPRB */ { JPU, LCDC, SIM } },
INTC_VECT(JPU, 0x560), INTC_VECT(LCDC, 0x580),
{ 0, TMU2, TMU1, TMU0, JPU, 0, 0, LCDC } },
{ 0xa4080004, 0, 16, 4, /* IPRB */ { JPU, LCDC, SIM } },
JPU, 0, 0, LCDC } },
{ 0xa4080004, 0, 16, 4, /* IPRB */ { JPU, LCDC, DMAC1A, BEU1 } },
INTC_VECT(JPU, 0x560),