JH7100_CLK_PLL1_OUT
JH71X0_GDIV(JH7100_CLK_DDRPLL_DIV2, "ddrpll_div2", CLK_IS_CRITICAL, 2, JH7100_CLK_PLL1_OUT),
JH7100_CLK_PLL1_OUT,
JH7100_CLK_PLL1_OUT,
JH7100_CLK_PLL1_OUT,
JH7100_CLK_PLL1_OUT,
JH7100_CLK_PLL1_OUT,
JH7100_CLK_PLL1_OUT),