IXGBE_RDBAL
{ IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
{ IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
{IXGBE_RDBAL(0), "RDBAL"},
case IXGBE_RDBAL(0):
regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));