arch/powerpc/lib/sstep.c

1011

j = IS_LE ? nr_vsx_regs - i - 1 : i;

arch/powerpc/lib/sstep.c

1016

j = IS_LE ? nr_vsx_regs - i - 1 : i;

arch/powerpc/lib/sstep.c

1024

j = IS_LE ? nr_vsx_regs - i - 1 : i;

arch/powerpc/lib/sstep.c

1029

j = IS_LE ? nr_vsx_regs - i - 1 : i;

arch/powerpc/lib/sstep.c

737

err = read_mem(&regs->gpr[reg + IS_LE], ea, 8, regs);

arch/powerpc/lib/sstep.c

763

err = write_mem(vals[IS_LE], ea, 8, regs);

arch/powerpc/lib/sstep.c

791

if (IS_LE && (op->vsx_flags & VSX_LDLEFT))

arch/powerpc/lib/sstep.c

799

i = IS_LE ? 8 : 8 - read_size;

arch/powerpc/lib/sstep.c

806

reg->d[IS_LE] = (signed int) reg->d[IS_LE];

arch/powerpc/lib/sstep.c

809

conv_sp_to_dp(&reg->fp[1 + IS_LE],

arch/powerpc/lib/sstep.c

810

&reg->dp[IS_LE]);

arch/powerpc/lib/sstep.c

818

reg->d[IS_BE] = reg->d[IS_LE];

arch/powerpc/lib/sstep.c

825

i = IS_LE ? 3 - j : j;

arch/powerpc/lib/sstep.c

829

u32 val = reg->w[IS_LE ? 3 : 0];

arch/powerpc/lib/sstep.c

831

i = IS_LE ? 3 - j : j;

arch/powerpc/lib/sstep.c

840

i = IS_LE ? 7 - j : j;

arch/powerpc/lib/sstep.c

848

i = IS_LE ? 15 - j : j;

arch/powerpc/lib/sstep.c

888

if (IS_LE && (op->vsx_flags & VSX_LDLEFT))

arch/powerpc/lib/sstep.c

901

i = IS_LE ? 8 : 8 - write_size;

arch/powerpc/lib/sstep.c

905

conv_dp_to_sp(&reg->dp[IS_LE], &buf.fp[1 + IS_LE]);

arch/powerpc/lib/sstep.c

922

i = IS_LE ? 3 - j : j;

arch/powerpc/lib/sstep.c

930

i = IS_LE ? 7 - j : j;

arch/powerpc/lib/sstep.c

938

i = IS_LE ? 15 - j : j;

arch/powerpc/lib/sstep.c

965

j = IS_LE ? nr_vsx_regs - i - 1 : i;

arch/powerpc/lib/sstep.c

970

j = IS_LE ? nr_vsx_regs - i - 1 : i;

arch/powerpc/lib/sstep.c

978

j = IS_LE ? nr_vsx_regs - i - 1 : i;

arch/powerpc/lib/sstep.c

983

j = IS_LE ? nr_vsx_regs - i - 1 : i;