IS_LE
j = IS_LE ? nr_vsx_regs - i - 1 : i;
j = IS_LE ? nr_vsx_regs - i - 1 : i;
j = IS_LE ? nr_vsx_regs - i - 1 : i;
j = IS_LE ? nr_vsx_regs - i - 1 : i;
err = read_mem(®s->gpr[reg + IS_LE], ea, 8, regs);
err = write_mem(vals[IS_LE], ea, 8, regs);
if (IS_LE && (op->vsx_flags & VSX_LDLEFT))
i = IS_LE ? 8 : 8 - read_size;
reg->d[IS_LE] = (signed int) reg->d[IS_LE];
conv_sp_to_dp(®->fp[1 + IS_LE],
®->dp[IS_LE]);
reg->d[IS_BE] = reg->d[IS_LE];
i = IS_LE ? 3 - j : j;
u32 val = reg->w[IS_LE ? 3 : 0];
i = IS_LE ? 3 - j : j;
i = IS_LE ? 7 - j : j;
i = IS_LE ? 15 - j : j;
if (IS_LE && (op->vsx_flags & VSX_LDLEFT))
i = IS_LE ? 8 : 8 - write_size;
conv_dp_to_sp(®->dp[IS_LE], &buf.fp[1 + IS_LE]);
i = IS_LE ? 3 - j : j;
i = IS_LE ? 7 - j : j;
i = IS_LE ? 15 - j : j;
j = IS_LE ? nr_vsx_regs - i - 1 : i;
j = IS_LE ? nr_vsx_regs - i - 1 : i;
j = IS_LE ? nr_vsx_regs - i - 1 : i;
j = IS_LE ? nr_vsx_regs - i - 1 : i;