IRQENABLE_L0

42

[IRQENABLE_L0] = { 0x0018, 0x00, OMAP_DMA_REG_32BIT },

1577

od->context.irqenable_l0 = omap_dma_glbl_read(od, IRQENABLE_L0);

1589

omap_dma_glbl_write(od, IRQENABLE_L0, od->context.irqenable_l0);

1868

omap_dma_glbl_write(od, IRQENABLE_L0, 0);

735

val = omap_dma_glbl_read(od, IRQENABLE_L0);

737

omap_dma_glbl_write(od, IRQENABLE_L0, val);